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VHDL-FPGA-Verilog list
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Verilog_CLOCK-v2013.10.07
Downloaded:0
Six digital display electronic clock, you can adjust the time by verifying
Date
: 2025-08-04
Size
: 955kb
User
:
hhxy
CPLD_LCD
Downloaded:0
Written in verilog 1602 Display of the program, versatility is strong, the test platform is DE0
Date
: 2025-08-04
Size
: 347kb
User
:
黄俊
ads805
Downloaded:0
Electric facilities used! TI' s written in verilog ADS805 debugger. Test platform is DE0.
Date
: 2025-08-04
Size
: 1.7mb
User
:
黄俊
vga_cd
Downloaded:0
Counting program written in verilog, displayed on the VGA, VGA suitable for beginners. Test platform DE0.
Date
: 2025-08-04
Size
: 3.22mb
User
:
黄俊
dianzhen_game
Downloaded:0
Written in verilog Dot Game, with a buzzer sound, involving parallel and serial chip 74HC595, 1602 display.
Date
: 2025-08-04
Size
: 2.44mb
User
:
黄俊
pingp16
Downloaded:0
Improved pingpong example, to increase the number of balls 16, for detecting vga output
Date
: 2025-08-04
Size
: 5kb
User
:
yuyeluo
traditional_fft
Downloaded:0
2048 FFT implementation synthesis
Date
: 2025-08-04
Size
: 1.95mb
User
:
仇路
QII_Intro_CN
Downloaded:0
FPGA introductory tutorial, each with a description, follow the instructions carefully exercises can quickly grasp the FPGA
Date
: 2025-08-04
Size
: 22.43mb
User
:
王自
UDA1345TS_CODEC
Downloaded:0
this the audio codec controller for UDA1345TS
Date
: 2025-08-04
Size
: 3.48mb
User
:
andre
main
Downloaded:0
Using field-programmable logic device (FPGA) production, the use of EDA software verilog HDL hardware description language control to control, and programming implementation. Buttons 7 to 1, respectively, for the seven n
Date
: 2025-08-04
Size
: 2kb
User
:
key_led_locked_CME
Downloaded:1
Domestic micro-FPGA Beijing Jager procedures, buttons, lights, encryption, tested.
Date
: 2025-08-04
Size
: 2.07mb
User
:
bozai
PreAmp_VHDL
Downloaded:0
VHDL Implementation for controlling Pre-amplifier of Spartan 3E
Date
: 2025-08-04
Size
: 1.77mb
User
:
Ryan
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