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VHDL-FPGA-Verilog list
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CSOMP
Downloaded:0
Compressed sensing reconstruction of sparse signal code, used in the process of OMP algorithm
Date
: 2025-07-22
Size
: 4.02mb
User
:
陈亭玉
DC_Motor_Main
Downloaded:0
Based on FPGAVeriloglanguage, realization of PWM control of DC motors, including circuit diagrams, master, control module, the speed module
Date
: 2025-07-22
Size
: 488kb
User
:
陆晓东
radix_2_fft
Downloaded:0
eight point radix-2 fft
Date
: 2025-07-22
Size
: 2.07mb
User
:
ifreeman
radix_4_fft
Downloaded:0
fft based-radix_4 realized
Date
: 2025-07-22
Size
: 210kb
User
:
ifreeman
fir-ip-vhdl
Downloaded:0
altera quartus fir ip nuclear vhdl program including test files
Date
: 2025-07-22
Size
: 3kb
User
:
bambod
iicbus
Downloaded:0
I2C Bus Design Based on Nios
Date
: 2025-07-22
Size
: 12.81mb
User
:
Ben Shen
DIGITLOCK
Downloaded:0
The program uses VHDL realization of the digital board in BASYS2 lock design platform for Xilinx12
Date
: 2025-07-22
Size
: 440kb
User
:
盛斌
DE2_LCM_CCD
Downloaded:0
Simple DC platform on DE2
Date
: 2025-07-22
Size
: 425kb
User
:
Scotty
FPGA
Downloaded:0
FPGA development information
Date
: 2025-07-22
Size
: 25.23mb
User
:
赵宇
simple_ram
Downloaded:0
the file about simple ram by VHDL code
Date
: 2025-07-22
Size
: 1kb
User
:
pham
06135529
Downloaded:0
A High Speed Low Power CAM With a Parity Bit and Power-Gated ML Sensing
Date
: 2025-07-22
Size
: 607kb
User
:
rajapraba
06208897
Downloaded:0
Reduced-Complexity LCCReed–Solomon Decoder Based on Unified Syndrome Computation
Date
: 2025-07-22
Size
: 672kb
User
:
rajapraba
«
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.13
.14
.15
.16
.17
818
.19
.20
.21
.22
.23
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4310
»
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