VHDL-FPGA-Verilog List Page 681

VHDL-FPGA-Verilog list

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Key_Dis---2 Downloaded：0: Another way to achieve dynamic scanning keyboard 2, according to the location of the keys show 1-9, belonging to FPGA-based applications
Date : 2025-09-11 Size : 3.8mb User : 李勇
Seg_Dis---3 Downloaded：0: Three of dynamic scanning FPGA digital display, static scanning procedures, using the keys an added
Date : 2025-09-11 Size : 4.62mb User : 李勇
Clock Downloaded：0: FPGA clock display program, you can follow the normal time, frequency adjustable, digital display 00-00-00, middle- can be changed. As long as the use of a nested loop structure to achieve
Date : 2025-09-11 Size : 1.22mb User : 李勇
DDS Downloaded：0: TLV5618 major reality in the FPGA module, learning the analog current signal into a digital signal, and the digital display, the program range 0-5V
Date : 2025-09-11 Size : 3kb User : 李勇
yudanpianjidechuankoutongxin Downloaded：0: FPGA serial communication with the MCU VHDL program based on
Date : 2025-09-11 Size : 243kb User : 罗扬燚
versionOK Downloaded：0: Music Cube: an audio signal acquisition, spectral information obtained by FFT transform, the spectral information is displayed on the LED array.
Date : 2025-09-11 Size : 13.08mb User : 黄陈旭
aes Downloaded：0: contains AES doc with code in Verilog
Date : 2025-09-11 Size : 939kb User : sravs
spi1 Downloaded：0: Using verilog language to achieve cpld EPM570 SPI communication with the EEPROM
Date : 2025-09-11 Size : 2kb User : LJL
multifuctional-digital-clock Downloaded：0: Multifunction digital clock, calendar, you can display the time, date, alarm clock, is very powerful in the DE0 by
Date : 2025-09-11 Size : 9.83mb User : 张宏广
clock Downloaded：0: verilog clock
Date : 2025-09-11 Size : 177kb User : silcret
yz Downloaded：0: Character LCD control display design, student number and name display
Date : 2025-09-11 Size : 493kb User : 苏黎世
top_FFT Downloaded：0: 128k-point FFT algorithm running water IP core design, top-level file, a total of 13 water
Date : 2025-09-11 Size : 2kb User : 徐天伟

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