VHDL-FPGA-Verilog List Page 489

VHDL-FPGA-Verilog list

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Proj_AND_V1 Downloaded：0: Basic vhdl code for and gate logic.
Date : 2025-06-19 Size : 204kb User : John
xilinx_DDR3_design_guide Downloaded：1: FPGA DDR3 design and application guide
Date : 2025-06-19 Size : 5.86mb User : 张三丰
adc7854 Downloaded：0: ADS7854 Texas Instruments. The code is built refer to the time sequence datasheet. You should better read the document first
Date : 2025-06-19 Size : 1kb User : Jet
time_check Downloaded：0: Slave two-way communication between the host system clock synchronization for spread spectrum, frequency hopping and so on. Initiated by the slave time alignment request, the host response time information to achieve the
Date : 2025-06-19 Size : 5kb User : 散散
gold_code_generator_rank10_b Downloaded：0: GOLD generate communication code sequence spreading code, the code length can be set manually, VHDL voice implementation.
Date : 2025-06-19 Size : 2kb User : 散散
dds_clk Downloaded：0: VHDL code for the FPGA DDS function, the output frequency is adjustable
Date : 2025-06-19 Size : 1kb User : 散散
AD_SAMPLE_PHASE_MATLAB Downloaded：0: test multi-channel AD sample signal s phase
Date : 2025-06-19 Size : 3kb User : 杨凯强
modelsim-C_compiler_issue Downloaded：0: modelsim the C compiler problem, for those who need to download reference
Date : 2025-06-19 Size : 175kb User : 磊
sample-vhdl Downloaded：0: basic vhdl codes for beginers
Date : 2025-06-19 Size : 53kb User : c m
I2Creadorwrite Downloaded：0: Based on the MAX II family literacy epm1270t iic
Date : 2025-06-19 Size : 3.29mb User : 石乾坤
siga Downloaded：0: 2014 electronic design contest e Title firmware module code, very good to achieve function.
Date : 2025-06-19 Size : 18.79mb User : hcl
bldc_motor_control_design_example Downloaded：0: actel VERILOG BLDC control of the use of actel FPGA
Date : 2025-06-19 Size : 724kb User :

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