VHDL-FPGA-Verilog List Page 4258

VHDL-FPGA-Verilog list

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SPI串口的内核实现spicore Downloaded：0: SPI string mouth essence realizes spicore the SPI string mouth essence to realize spicore the SPI string mouth essence to realize spicore
Date : 2025-05-14 Size : 6kb User : lfq
cpld_bus Downloaded：0: CPLD bus Verilog HDL code, the PLD-10 Quartus4 platform to run through.
Date : 2025-05-14 Size : 213kb User : hamlemon
Convolutional encoding and Viterbi decoding with k Downloaded：0: convolutional coding and Viterbi decoding when K 7:00 for reference convolutional encoding and Viterbi decoding with k 1 2 7 rate
Date : 2025-05-14 Size : 248kb User : 周小川
4x4的数据选择器 Downloaded：0: 4x4 with the VHDL data selectors, under the maxplusII compiler, simulation through. Yes constitute large-scale digital circuits important components. VHDL Analysis for beginners to learn.
Date : 2025-05-14 Size : 3kb User : roya
pci 的vhdl 源代码 Downloaded：0: The source code of PCI VHDL.
Date : 2025-05-14 Size : 3kb User : 陈旭
SECLOCK Downloaded：0: from a book copied but with the MAX PLUSII compile some of the problems beginners forgiven
Date : 2025-05-14 Size : 4kb User : male
STUDY_CPLD.RAR Downloaded：0: This is the programmable logic device (CPLD), the entry-level beginners articles for reference purposes only.
Date : 2025-05-14 Size : 1.61mb User : 开心火
65filter Downloaded：0: 65 FIR digital filter design ~ ~ with simulation data to come in through the importation of data from experiments completed filtering of the digital filter in the whole algorithm analysis including input a sum then multi
Date : 2025-05-14 Size : 3kb User : 凌燕
t80 Downloaded：0: Configurable cpu core that supports Z80, 8080 and gameboy instruction sets
Date : 2025-05-14 Size : 41kb User : 吴毅
ELEC_LOCK Downloaded：0: four electronic password lock with a keyboard scan button shake, LCD driver encryption
Date : 2025-05-14 Size : 2kb User : xf
USB枚举 Downloaded：0: Altera NIOS processor experiments, programming environment is QUARTUS in NIOS SHELL compiler functionality. Experimental USB interface
Date : 2025-05-14 Size : 35kb User : xf
LCD显示实验 Downloaded：0: Altera NIOS processor, using VHDL in QUARTUS prepared with NIOS SHELL debug through experimental LCD
Date : 2025-05-14 Size : 35kb User : xf

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