VHDL-FPGA-Verilog List Page 3926

VHDL-FPGA-Verilog list

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RS_FPGA Downloaded：0: RS coding in the FPGA to achieve the theory and method useful for design RS encoding, and possession of less FOGA resources
Date : 2025-06-08 Size : 620kb User : 番茄
RS_Euclid_FPGA Downloaded：0: RS decoding Euclid algorithm and its FPGA implementation, and through the simulator results are helpful for the design of RS decoder
Date : 2025-06-08 Size : 51kb User : 番茄
GF_2_m_FPGA Downloaded：0: Domain multiplier GF_2_m_ rapid design and FPGA realization for rs wing made the understanding of code and design has helped
Date : 2025-06-08 Size : 198kb User : 番茄
ethernet_tri_mode.tar Downloaded：0: Using FPGA verilog hdl realize Gigabit Ethernet MAC.
Date : 2025-06-08 Size : 723kb User : hrui
match_rec Downloaded：0: 脢鹿脫脙VERILOG脢渭脧脰QPSK脨脜潞脜渭脛脝楼脜盲脗脣虏篓拢卢露脭没潞脜鹿媒虏脡脩霉脗脢脦陋 4 拢卢脭脷鲁脤脨貌脰脨脡猫露篓脧脿鹿脴氓渭脛录矛虏芒脙脜脧脼脦陋 3
Date : 2025-06-08 Size : 209kb User : 王莉
CORRECE Downloaded：0: CDMA system using MATLAB to complete the relevant receivers, which Hadamard matrix of 128 bands, simulation-10DB-bit signal to noise ratio for
Date : 2025-06-08 Size : 1kb User : 王莉
rake Downloaded：0: 脢鹿脫脙matlab脢渭脧脰cdma 脧渭脥鲁渭脛rake 陆脫脢脮禄煤拢卢卤脠陆脧脳卯
Date : 2025-06-08 Size : 1kb User : 王莉
altera_up_avalon_ps2 Downloaded：0: Sopc builder used to add components used ps/2 keyboard IPCore
Date : 2025-06-08 Size : 207kb User : Morgan
DE2_SD_Card_Audio Downloaded：0: DE2 development company for the altera board SD_Card_Audio examples
Date : 2025-06-08 Size : 1.53mb User : Morgan
DE2_TV Downloaded：0: Altera Corporation for DE2 development board of the TV demonstration
Date : 2025-06-08 Size : 137kb User : Morgan
MzT24-12.4_TFT_LCD Downloaded：0: Tft good reference is listed, eight general-purpose parallel port, very fast shift value
Date : 2025-06-08 Size : 1.76mb User : 张运果
VHDL Downloaded：0: VHDL programming language introduced the basic grammar, and some programming examples
Date : 2025-06-08 Size : 232kb User : s_u_n2002

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