VHDL-FPGA-Verilog List Page 36

VHDL-FPGA-Verilog list

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电子时钟 Downloaded：1: Digital clock based on DE2-115 1. LCD display, digital tube display 2. whole point 3. alarm clock 4. setting time 5. set the alarm clock
Date : 2025-06-26 Size : 4.69mb User : AZ1111
数码管显示 Downloaded：1: Rolling on the digital tube to display the school number
Date : 2025-06-26 Size : 615kb User : 低转的丝巾
FPGA乐曲演奏电路 Downloaded：0: design of music hardware performance circuit(verilogVHDL)
Date : 2025-06-26 Size : 948kb User : Dexter_
实验九计算机核心（CPU+RAM）的设计与实现 Downloaded：0: CPU experiment of computer organization principle, based on quartus platform
Date : 2025-06-26 Size : 3.21mb User : 丁丫头
mux16 Downloaded：0: FPGA multiplier program based on quartus
Date : 2025-06-26 Size : 2kb User : 艾尼more
ad9833 Downloaded：1: AD9833's FPGA driver, a programming idea, easy to understand, suitable for beginners.
Date : 2025-06-26 Size : 5.71mb User : halftop
rs232 Downloaded：0: The complete project of serial communication is compiled on the vivado platform using VHDL language, and it can be successfully verified with the EGO1 development board.
Date : 2025-06-26 Size : 681kb User : vmansus
俄罗斯方块 Downloaded：0: Tetris is implemented by VGA and implemented by Verilog code.
Date : 2025-06-26 Size : 18.15mb User : smily520
cpu自制入门代码AZPR_RTL Downloaded：0: CPU DIY ............
Date : 2025-06-26 Size : 78kb User : dastudio
DHT11 Downloaded：0: The realization of DHT11 temperature and humidity reading by Verilog
Date : 2025-06-26 Size : 920kb User : iseaad
sha1_latest.tar Downloaded：1: SHA message digest, a hash algorithrim, very useful
Date : 2025-06-26 Size : 45kb User : dailyviola
Clock Downloaded：0: This design realizes a digital clock design based on FPGA, uses the Verilog hardware description language to design the digital circuit, uses the top down method to decompose the circuit system layer by layer, and design
Date : 2025-06-26 Size : 3.66mb User : 威威谈谈

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