VHDL-FPGA-Verilog List Page 3102

VHDL-FPGA-Verilog list

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fpga Downloaded：0: To open car simulation based on EasyFPGA030 design and simulation table tennis game design.
Date : 2025-11-15 Size : 1.25mb User : pudnhh
fpga1 Downloaded：0: DC Motor Control Based on EasyFPGA030 circuit design and four-digit combination lock.
Date : 2025-11-15 Size : 1.21mb User : pudnhh
fpga2 Downloaded：0: The waveform generator based on EasyFPGA030 serial receiver design and display design.
Date : 2025-11-15 Size : 1.1mb User : pudnhh
ActelFPGA_PCI Downloaded：0: This document describes the FPGA by Actel Flash to achieve PCI bridge chips.
Date : 2025-11-15 Size : 235kb User : pudnhh
ADC_TLC549 Downloaded：0: TLC549 the VHDL source code has been test driving the driving source through the TLC549 has converted to energy and the conversion complete flag
Date : 2025-11-15 Size : 1kb User : 123
clkdiv Downloaded：0: Duty cycle factor can be freely adjustable frequency divider set the language for the Verilog HDL
Date : 2025-11-15 Size : 1kb User : 123
smart Downloaded：0: ZLG' s SmartEDA the serial source code, according typing computer books
Date : 2025-11-15 Size : 1kb User : 123
FIFO Downloaded：0: Speeds up to 130MHz for high-speed data acquisition program source code for the Verilog
Date : 2025-11-15 Size : 114kb User : 123
verilogFIR Downloaded：0: The source of the FIR digital filter for the Verilog test performance is very good
Date : 2025-11-15 Size : 624kb User : 123
elevator Downloaded：0: This is a project about a elevator(lift). It can go up/down , stop . Will show the number of the floor on which it is at that moment,
Date : 2025-11-15 Size : 2kb User : alex_murderer
memtest Downloaded：0: In the digital system, there are many chips, and different features are used to realize different functions, which generally include CPU,FPGA,AD,DA, memory, ASSP (special standard module), ASIC, etc. The CPU is used for
Date : 2025-11-15 Size : 218kb User : 平凡
states Downloaded：0: Digital clock is a practical and simple for independent design, but according to different practices, changes and a lot of functions, designed to the sub-frequency digital clock, counting, state transition, binary conver
Date : 2025-11-15 Size : 169kb User : 平凡

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