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VHDL-FPGA-Verilog list
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risc cpu core
Date : 2025-11-15 Size : 966kb User : yzhang

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arm6 verilog core
Date : 2025-11-15 Size : 7kb User : yzhang

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With 32-byte deep FIFO, SPI communication station.
Date : 2025-11-15 Size : 1.14mb User : wangwei

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UART VerilogCommand Parsing NiosII serial serial parts, including the interruption, send the command prompt, receiving treatment and other characters. Spent a lot of hard work! Definitely useful for beginners
Date : 2025-11-15 Size : 4kb User : 李燕乐

Based EasyFPGA030 Design and Implementation of a matrix keyboard works.
Date : 2025-11-15 Size : 305kb User : pudn_cc6

The square root operation on EasyFPGA030 achieve project.
Date : 2025-11-15 Size : 199kb User : pudn_cc6

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Synchronous FIFO based EasyFPGA030 Design and Implementation of Engineering.
Date : 2025-11-15 Size : 569kb User : pudn_cc6

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DualPort RAM Chinese test routines.
Date : 2025-11-15 Size : 1.82mb User : pudn_cc6

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One feature is the ability C8051F multiplier to 100M. Recently used. In MCU debugging functions through its PLL multiplier. Used for reference for a friend.
Date : 2025-11-15 Size : 1kb User :

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Shift Register VHDL program developed in Modelsim
Date : 2025-11-15 Size : 1kb User : Sivraj P

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Serial In Parallel Out Shift Register in VHDL in Modelsim
Date : 2025-11-15 Size : 1kb User : Sivraj P

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Various VHDL programs written in Modelsim
Date : 2025-11-15 Size : 2kb User : Sivraj P
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