VHDL-FPGA-Verilog List Page 2990

VHDL-FPGA-Verilog list

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pxa_27x_dev_man Downloaded：0: P310 platform
Date : 2025-11-18 Size : 7.02mb User : Lifang
altera_avalon_sdram_slave Downloaded：0: Altera avalon sdram controller salve.
Date : 2025-11-18 Size : 5kb User : liubo
8255_VHDL_source Downloaded：0: a project about 8255 chip based on quartusII,discripted by vhdl
Date : 2025-11-18 Size : 277kb User : voncedar
CaudaldeRedesATM Downloaded：0: Optimizing ATM Nets by Genetic Algorithms
Date : 2025-11-18 Size : 302kb User : Alzaris
matlab_tdm_example_sp2010 Downloaded：0: 6 Counter
Date : 2025-11-18 Size : 18.07mb User : 陈常常
TRDB_LCM Downloaded：0: DE1/DE2 of TRDB_LCM drive Verilog source code.
Date : 2025-11-18 Size : 243kb User : zhouxiao
TRDB_DC2 Downloaded：0: DE1/DE2CCD camera Verilog source code.
Date : 2025-11-18 Size : 9.9mb User : zhouxiao
8051vhdl_ip_core Downloaded：0: 8051 ip core Vhdl complete source code program
Date : 2025-11-18 Size : 638kb User : zhouxiao
sdram_hr_hw Downloaded：0: SDRAM read and write Verilog source code control testing procedures.
Date : 2025-11-18 Size : 100kb User : zhouxiao
2step_iir_filter Downloaded：1: 2-order iir 2KHz notch filter Verilog source code.
Date : 2025-11-18 Size : 110kb User : zhouxiao
Descrierea_comenzilor Downloaded：0: Translation of the datasheet of the UC1610 GLCD controller
Date : 2025-11-18 Size : 17kb User : Morphy
ALAW_LINEAR_CONVERTER Downloaded：0: This is a HDL implementation of G711 A-LAW codec. It converts LINEAR to ALAW and vice versa.
Date : 2025-11-18 Size : 3kb User : Christian

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