VHDL-FPGA-Verilog List Page 2983

VHDL-FPGA-Verilog list

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chunchuqidesheji Downloaded：0: In the computer system, generally provide a certain amount of memory. FPGA implementation of the system in use, unless you can use the FPGA itself memory resources, you can also use the FPGA' s external expansion memo
Date : 2025-11-19 Size : 882kb User : shenlina
fenpengqi Downloaded：0: Even multiple of the principle of frequency is very simple, such as 8 points Frequency Circuit
Date : 2025-11-19 Size : 567kb User : shenlina
jiandandezuheluojidianlusheji Downloaded：0: Rounding discrimination circuit. Design a rounded discrimination circuit, the input 8421BCD code requirements when the input is greater than or equal to 5, the discrimination circuit output is 1, otherwise 0.
Date : 2025-11-19 Size : 13kb User : shenlina
jishuji Downloaded：0: The basic RS flip-flop, synchronous RS flip-flop, integrated JK flip-flop, D flip-flop while a FPGA chip analog integrated function, and to study their mutual transformation method.
Date : 2025-11-19 Size : 1.24mb User : shenlina
VHDL-diante-KONGZHI-CHENGXU Downloaded：0: CHENGXU
Date : 2025-11-19 Size : 9kb User : liuchao
Karnaugh_Maps Downloaded：0: In the logic circuit design, we have to optimize the logic. On the one of method, it is used karnaugh map.
Date : 2025-11-19 Size : 47kb User : male
Verilog Downloaded：0: Some small programs written using verilog have full adder, counter, comparator VGA display, keyboard scanning, etc.
Date : 2025-11-19 Size : 8.49mb User : 于苏
stop_watch Downloaded：0: Stopwatch function to achieve an accuracy of 0.01 seconds. (Using ACEX1K series EP1K30TC144-3 chip)
Date : 2025-11-19 Size : 185kb User : Haifengqingfu
vhdl Downloaded：0: vhdl sheji
Date : 2025-11-19 Size : 7kb User : 马生
cic Downloaded：1: altera company quartusII provided cic ip, file version is 8.0
Date : 2025-11-19 Size : 6.72mb User : tiantian
e1framerdeframer Downloaded：0: E1 framer and deframer, clock adjust, clock phase adjust
Date : 2025-11-19 Size : 17kb User : 章容
notefortx_src Downloaded：0: Digital TV, Tsinghua University, the code on the dtmb modulator described
Date : 2025-11-19 Size : 24kb User : jack

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