VHDL-FPGA-Verilog List Page 2607

VHDL-FPGA-Verilog list

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dianzheng333 Downloaded：0: dianzhengxianshi VHDL
Date : 2025-11-22 Size : 191kb User : hu
code3 Downloaded：0: this is slice processor
Date : 2025-11-22 Size : 1kb User : thomas
shifter_left_8_8_4 Downloaded：0: barrel shifter. 8 inputs,8 outputs. And every input or output has 4bits.
Date : 2025-11-22 Size : 1kb User : zhang
7-voting Downloaded：0: 7 voting
Date : 2025-11-22 Size : 4kb User : 袁欢
3-8Decoder Downloaded：0: Show only 0,1 binary decoder. Showing 0-9 decimal decoder, display decoder display 0-F
Date : 2025-11-22 Size : 25kb User : 袁欢
8-3encoder Downloaded：0: Show only 0,1 binary decoder. Showing 0-9 decimal decoder, display decoder display 0-F
Date : 2025-11-22 Size : 26kb User : 袁欢
100jinzhijishuqi Downloaded：0: 1) counter clock input signal for the 1S (2) function of the counter counts from 0 to 99, shown in decimal form (3) has a reset terminal and the two control terminal clr plus and minus, in the role of these control signa
Date : 2025-11-22 Size : 69kb User : 袁欢
EDAkejian5 Downloaded：0: In this paper, high-speed environments using these technologies state machine design specifications and methods of analysis and optimization methods, and the corresponding example.
Date : 2025-11-22 Size : 627kb User : 袁欢
LPC_Peri Downloaded：0: Low pins bus
Date : 2025-11-22 Size : 3kb User : fpgabo
LPC_Host Downloaded：0: LPC bus, the host code, VHDL language description
Date : 2025-11-22 Size : 2kb User : fpgabo
ads7809 Downloaded：0: ADS7809 is a Burr-Brown Introduces High Precision AD capture chip. It uses a single 5V supply, with 16-bit successive approximation register, sampling and high precision, low power consumption. To achieve its configurati
Date : 2025-11-22 Size : 1kb User : dengxiaosong
ad5399 Downloaded：0: AD5399 is a serial input, dual-channel, 12-bit DAC, digital code can be twos complement. . Configuration and use Verilog functions to achieve its
Date : 2025-11-22 Size : 1kb User : dengxiaosong

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