VHDL-FPGA-Verilog List Page 2586

VHDL-FPGA-Verilog list

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ALTERA Downloaded：0: altera manual selection device companies, fpga designer to do the necessary documents, can not refer to the following
Date : 2025-11-22 Size : 690kb User : 安静
conv_enc Downloaded：0: The program document is to achieve convolutional code with verilog coding and decoding, the report analysises the principle ,the code also has a detailed program note.
Date : 2025-11-22 Size : 212kb User : 飞扬奇迹
lfsr Downloaded：0: This experiment introduces the principle of pseudo-random sequence and its encoded with the verilog language implementation, a detailed code Notes
Date : 2025-11-22 Size : 75kb User : 飞扬奇迹
FIR-lv-bo-code Downloaded：0: This code source code for the FIR filter design, and the code does a corresponding improvement, integrated simulation results successfully
Date : 2025-11-22 Size : 2kb User : 飞扬奇迹
IC-149 Downloaded：0: Top-down Implementation of Pipelined AES Cipher
Date : 2025-11-22 Size : 69kb User : Aisha
BmpDecoder Downloaded：0: Souce code of BmpDecoder for Altera FPGA Nios II uClinux OpenCV
Date : 2025-11-22 Size : 2kb User : 岳弘达
FPGA-Design-Guide Downloaded：0: FPGA design for some of the guiding principles described. Is a good guide book for beginners.
Date : 2025-11-22 Size : 254kb User : ben
second7-02 Downloaded：0: Environment in quartusII codec chip used on the HD6408 and HD6409-driven way to achieve encoding and decoding of Manchester
Date : 2025-11-22 Size : 1.53mb User : 赵东
stepmot Downloaded：0: Mainly for matrix keyboard Verilog HDL Language Design and Implementation
Date : 2025-11-22 Size : 2kb User : wangyongjun
voxel_image Downloaded：0: image description ri really good
Date : 2025-11-22 Size : 2kb User : shanmultaq
RS232-RefComp Downloaded：0: Very useful on serial vhdl language program, computer communication with the pc
Date : 2025-11-22 Size : 251kb User : 朝阳区
s3_bom Downloaded：0: sparten bom development board list, very detailed description of each component
Date : 2025-11-22 Size : 7kb User : 朝阳区

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