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VHDL-FPGA-Verilog list
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FPGA can be used to achieve their own definition of liquid crystal display characters 1602
Date : 2025-11-23 Size : 52kb User : 王砂

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12.3 Xilinx installation, registration, operation, commissioning, design, very good entry
Date : 2025-11-23 Size : 468kb User : rock

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linear code matlab/verilog
Date : 2025-11-23 Size : 3kb User : 周天

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SCM and fpga communication tester for testing the chip, based on quartus
Date : 2025-11-23 Size : 1.47mb User : 林东斌

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Bus-based approach to the novice' s point, floating point routines, be in line with fpga
Date : 2025-11-23 Size : 16kb User : 林东斌

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MII interface programming, send and receive Ethernet MAC frame for the FPGA.
Date : 2025-11-23 Size : 3kb User : 郑冉

FPGA-based usb2.0 ip core design, the language used is the verilog
Date : 2025-11-23 Size : 52kb User : 唐明桂

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divide from 50mhz to 1 hz
Date : 2025-11-23 Size : 263kb User : vlad

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divide from 50mhz to 1 hz
Date : 2025-11-23 Size : 278kb User : vlad

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divide from 50mhz to 2 hz
Date : 2025-11-23 Size : 273kb User : vlad

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simple counter for demonstration purposes
Date : 2025-11-23 Size : 3kb User : vlad

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The file is a VHDL programming
Date : 2025-11-23 Size : 238kb User : 苏胜东
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