VHDL-FPGA-Verilog List Page 1723

VHDL-FPGA-Verilog list

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traffic-light-design-report Downloaded：0: The traffic lights experiment report, contains the code and detailed introduction
Date : 2025-09-15 Size : 19kb User : chenhenhao
1M Downloaded：0: Divide the VHDL program, introduced in great detail, and the hope that they can bring convenience to very practical
Date : 2025-09-15 Size : 1kb User : 王龙飞
cnt1000 Downloaded：0: A thousand counter vhdl language design, the program is simple and easy to understand, easy for beginners to master, I hope to bring convenience
Date : 2025-09-15 Size : 1kb User : 王龙飞
Hex_decoder_7seg Downloaded：0: Hexadecimal display decoder VHDL language design, high and low changes in the number of digital tube display
Date : 2025-09-15 Size : 1kb User : 王龙飞
Shfit8bit Downloaded：0: 8-bit shift register vhdl design, through simulation, the program is easy to understand, easy for beginners learn from
Date : 2025-09-15 Size : 1kb User : 王龙飞
fenpin Downloaded：0: Divider, size change DWIDTH can change the divider, giving top priority
Date : 2025-09-15 Size : 1kb User : 王龙飞
CPLDfrequency Downloaded：0: Frequency counter:function as a frequency division. counter each bit. latch and clear
Date : 2025-09-15 Size : 1kb User : arthur
SimpleProcessor Downloaded：0: The design of a simple processor contains a certain skilled register and a selector, an addition/subtraction unit, a counter and a control unit.
Date : 2025-09-15 Size : 996kb User : jake
LightControl Downloaded：0: Simple state machine design- Thunderbird taillights controller design
Date : 2025-09-15 Size : 256kb User : jake
simpleRAM Downloaded：0: Using several different methods of design FPFA-chip memory
Date : 2025-09-15 Size : 640kb User : jake
NIOSUCOSII Downloaded：0: The initial establishment of the μC/OS-II experiment based on NIOS NIOS engineering
Date : 2025-09-15 Size : 15.04mb User : jake
lab13 Downloaded：0: verilog cpu design
Date : 2025-09-15 Size : 885kb User : chengshanbo

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