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VHDL-FPGA-Verilog list
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FM_DemodNew
Downloaded:0
FM receiver on FPGA FM receiver design With VEIRLOG language program, use QUARTUSii and MODELSIM joint simulation
Date
: 2025-09-13
Size
: 8.44mb
User
:
Project
Downloaded:0
Based on VHDL language programming realized the intersection of traffic light controller
Date
: 2025-09-13
Size
: 1.79mb
User
:
wahing-machine-VHDL-design
Downloaded:0
use VHDL languerage fulfill the design of an automatic washing maching.
Date
: 2025-09-13
Size
: 1.04mb
User
:
丁帅
xyj
Downloaded:0
In Quartus Ⅱ software environment, utilizing laboratory integrated chips, use VHDL language programming simulating a washing machine control system of basic function.
Date
: 2025-09-13
Size
: 332kb
User
:
mux2x2_1
Downloaded:0
The use of Verilog language in FPGA platform to achieve multiple choice function.
Date
: 2025-09-13
Size
: 229kb
User
:
丁帅
basketball24
Downloaded:0
24 second timer in the FPGA-based basketball,Development environment for MAXPLUS
Date
: 2025-09-13
Size
: 1kb
User
:
cynthia
addsub
Downloaded:0
The use of Verilog language, in FPGA platform to achieve plus-minus function
Date
: 2025-09-13
Size
: 271kb
User
:
丁帅
10jinzhijishuqi
Downloaded:0
Decimal counter fpga-based development environment for maxpius
Date
: 2025-09-13
Size
: 54kb
User
:
cynthia
comparator
Downloaded:0
The use of Verilog language, in FPGA ISE development tools to achieve the comparator function.
Date
: 2025-09-13
Size
: 615kb
User
:
丁帅
kt1
Downloaded:0
Controlled 100 hex reversible counter FPGA-based operating environment maxplus
Date
: 2025-09-13
Size
: 257kb
User
:
cynthia
flip_flop
Downloaded:0
The use of Verilog language, in FPGA ISE development tools to achieve the flip-flop function.
Date
: 2025-09-13
Size
: 158kb
User
:
丁帅
kt2
Downloaded:0
FPGA-based traffic light control system, red, green, according to certain rules to turn on and off the green light indicates that the lane is allowed to pass red light when the lane is closed to traffic. And lighting dur
Date
: 2025-09-13
Size
: 284kb
User
:
cynthia
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