VHDL-FPGA-Verilog List Page 154

VHDL-FPGA-Verilog list

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sai_ex72 Downloaded：0: This program has exceeded the performance of other algorithms, Including AHP, factor analysis, regression analysis, cluster analysis, DC-DC power single-part set-loop control.
Date : 2025-05-19 Size : 147kb User : pqsgpjm
FPGA 经典 100 问 Downloaded：0: FPGA classic 100 questions, some better data collation
Date : 2025-05-19 Size : 3.11mb User : 刘磊帅锅
cordic Downloaded：0: verilog version of cordic algorithm
Date : 2025-05-19 Size : 4kb User : 垚垚佟
jp Downloaded：0: EDA experiment with Verilog language
Date : 2025-05-19 Size : 2kb User : miaomiaojiang
y210 Downloaded：0: EDA experiment with verilog language
Date : 2025-05-19 Size : 1kb User : miaomiaojiang
clock1 Downloaded：0: EDA experiment with verilog language
Date : 2025-05-19 Size : 1kb User : miaomiaojiang
digital_lock_vga_display Downloaded：0: Altera DE1 platform digital password lock design, can drive VGA display
Date : 2025-05-19 Size : 17.07mb User : SDUGNN
jingxiang_beipin Downloaded：0: To achieve encoder and 4 times the frequency, can be used for motor speed and so on.
Date : 2025-05-19 Size : 4kb User : 子炎恋紫雪
keypad Downloaded：0: 4 * 4 of the film button, using the state machine to achieve decoding and key function
Date : 2025-05-19 Size : 2mb User : 子炎恋紫雪
uart_ip Downloaded：0: Implementation of serial communication module settings, including frequency division, baud rate generation, interface timing requirements
Date : 2025-05-19 Size : 6kb User : 子炎恋紫雪
cmos_i2c_ov7670 Downloaded：0: Complete the OV7670 camera an I2C protocol configuration, slave host timing read write function
Date : 2025-05-19 Size : 22kb User : 子炎恋紫雪
sdram_ip Downloaded：0: Complete the SDRAM power-on configuration, the state machine to write its read-write module, memory module, and through two asynchronous as a storage and read the channel
Date : 2025-05-19 Size : 163kb User : 子炎恋紫雪

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