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de2_build
Downloaded:0
De2_build: It contains the FPGA configuration file of the comprehensive Nios II system in Section 16.10.2 and software image files for the DE2 board. These files can be used for quick demo or software development. Note t
Date
: 2025-05-19
Size
: 1.34mb
User
:
davido
clock
Downloaded:0
just lke the chinese says
Date
: 2025-05-19
Size
: 304kb
User
:
yhhyhh
traffic_lab6
Downloaded:0
just like the chinese say,my english is poor
Date
: 2025-05-19
Size
: 2.94mb
User
:
yhhyhh
VGA_test3
Downloaded:0
my english is poor, so have a look at the chinese
Date
: 2025-05-19
Size
: 1.57mb
User
:
yhhyhh
quartuswork
Downloaded:0
VHDL entry examples, a full adder and a half adder quartus9.1 program, can be run directly
Date
: 2025-05-19
Size
: 2.51mb
User
:
芮芊
Verilog-HDL基础知识非常好的学习教程
Downloaded:0
Verilog-HDL basic knowledge, a very good learning tutorial
Date
: 2025-05-19
Size
: 556kb
User
:
芮芊
4.3tftlcd
Downloaded:0
Using the 4.3 'TFT_LCD driver document written by Altera company platform to display color stripes
Date
: 2025-05-19
Size
: 13kb
User
:
芮芊
source code
Downloaded:0
2.6'TFT_LCD driver source program, you can run directly on the quartus II platform
Date
: 2025-05-19
Size
: 51kb
User
:
芮芊
verilog黄金参考指南中文版
Downloaded:0
Verilog very good guide to Chinese programming skills, very detailed
Date
: 2025-05-19
Size
: 470kb
User
:
芮芊
ddr3_128
Downloaded:0
DDR3 read and write operations,the use of spartan6 platform validation.
Date
: 2025-05-19
Size
: 10.21mb
User
:
雷力风神
temp
Downloaded:0
Time is always the basic need of people, and in the fast pace of today's society, time is a very important tool. The electronic clock is a clock device function by using electronic technology, compared with the mechanica
Date
: 2025-05-19
Size
: 1.3mb
User
:
niconi
chysn
Downloaded:0
Automatic identification in the matlab environment the size of the connected area, For time-frequency analysis algorithm, Principal component analysis of multivariate data analysis projection.
Date
: 2025-05-19
Size
: 147kb
User
:
tfeaivu
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