VHDL-FPGA-Verilog List Page 1533

VHDL-FPGA-Verilog list

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spi_ctrl Downloaded：0: spi bus, including incentives, has been verified.
Date : 2025-09-12 Size : 1kb User : 钟大
square_root Downloaded：0: The square root hdl language, including the test stimuli, has been verified.
Date : 2025-09-12 Size : 1kb User : 钟大
chuangganqi Downloaded：0: Thermistor temperature sensor, do not know what to say
Date : 2025-09-12 Size : 655kb User : 刘家宇
uart_rx.fit Downloaded：0: uart core : uart rx fit
Date : 2025-09-12 Size : 12kb User : cuong
Code-UART Downloaded：0: code deverloper uart core
Date : 2025-09-12 Size : 4.22mb User : cuong
I2C Downloaded：0: i2c core : top module
Date : 2025-09-12 Size : 3kb User : cuong
i2c_master_bit_ctrl Downloaded：0: i2c core : master bit control
Date : 2025-09-12 Size : 5kb User : cuong
i2c_master_byte_ctrl Downloaded：0: i2c core : i2c master byte control
Date : 2025-09-12 Size : 3kb User : cuong
i2c_master_top Downloaded：0: i2c core : i2c master top
Date : 2025-09-12 Size : 4kb User : cuong
itu656 Downloaded：0: convert pal to itu-656
Date : 2025-09-12 Size : 1kb User : meir
oc_i2c_master Downloaded：0: endorsed by the i2c controller IP provided by the open cores on the FPGA. With the relevant test procedures
Date : 2025-09-12 Size : 267kb User : jine
CODE Downloaded：0: flash i2c spi ps2
Date : 2025-09-12 Size : 23kb User : 吴震

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