VHDL-FPGA-Verilog List Page 15

VHDL-FPGA-Verilog list

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课设光立方代码 Downloaded：0: Based on CPLD and programming with VHDL language, an 8 * 8 * 8 optical cube control is realized
Date : 2025-06-24 Size : 7kb User : 冲激响应t
dma_ip_drivers-master Downloaded：0: Xilinx FPGA DMA Driver
Date : 2025-06-24 Size : 11.02mb User : wykay
Labview Downloaded：0: labview调用halcon 缩放显示图片
Date : 2020-02-07 Size : 14.87mb User : zhangjian1234
STM32F1步进电机S加减速源代码 Downloaded：0: Stepping motor controlled by single chip microcomputer
Date : 2025-06-24 Size : 1.53mb User : 何伟东
黑金 AX545516开发板 Verilog 教程 Downloaded：0: xilinx demo board designed example
Date : 2025-06-24 Size : 18.97mb User : augustwp
04_uart_test Downloaded：1: FPGA UART test code,simple and easy to study,good
Date : 2020-02-25 Size : 3.37mb User : 年轻的国王
通信协议FPGA Downloaded：0: This design is based on FPGA high-speed parallel interface communication interface and protocol design, the design uses 8 Bit parallel interface ensures the data stability under high-speed parallel by configuring the FIF
Date : 2025-06-24 Size : 18.7mb User : 蔺娇娇
new Downloaded：0: Accelerometers adxl357 read the acceleration value of XYZ three-axis direction through SPI
Date : 2025-06-24 Size : 5kb User : LJHER
basketball_24time1 Downloaded：0: This document mainly uses Verilog language to realize basketball 24 second timer, which is a big assignment of digital electronic technology course I do. It contains the entire folder. After decompression, it can be run
Date : 2025-06-24 Size : 5.38mb User : 1003512666
Xilinx Downloaded：0: LDPC, CPRI, Turbo, Polar, JESD204B/C HDMI1.4/2.0, MIPI CSI-2, MIPI DSI AXI CAN AXI USB2.0 SD Card Host Reed-Solomon Decoder/Encoder 10G Enthernet MAC 25G Enthernet MAC 40G Enthernet MAC 50G Enthernet MAC 100G Enthernet M
Date : 2025-06-24 Size : 1kb User : liyan2020
ac620_calculator_key_board Downloaded：0: The calculator based on Verilog uses matrix keyboard to input data and digital tube to display the operation process and results. The development board based on little mac620 passed the verification
Date : 2025-06-24 Size : 40kb User : 小梅哥fpga
FPGA实现Jpeg压缩，和视频采集程序 Downloaded：0: Zynq - Main - register access Mio
Date : 2025-06-24 Size : 101kb User : kongqiweiliang

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