VHDL-FPGA-Verilog List Page 139

VHDL-FPGA-Verilog list

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mys-xc7z020-arm-hdmi-xylon Downloaded：0: Zturn board verilog source with HDMI driver.
Date : 2025-05-19 Size : 29.51mb User : ratfink
pl_int Downloaded：0: Zturn board basic board init.
Date : 2025-05-19 Size : 6.02mb User : ratfink
gpio_axi Downloaded：0: Zturn board - GPIO - AXI
Date : 2025-05-19 Size : 21.56mb User : ratfink
LIBRARY Downloaded：0: traffic light Design a north-south direction of the main road, East and west direction for the trunk road;
Date : 2025-05-19 Size : 13kb User : godlu666
s3esk_startup Downloaded：0: spartan 3E starter kit ; firmware after pane ; you can fix your spartan 3E with this code because it was not on maintenance this type of cards
Date : 2025-05-19 Size : 1.53mb User : lovers2015
DCT_IDCT Downloaded：0: DCT and Idct with vhdl and verilog
Date : 2025-05-19 Size : 61kb User : lovers2015
Read_Write_Text_File_VHDL Downloaded：0: read and write text to vhdl language
Date : 2025-05-19 Size : 2kb User : lovers2015
ip-cores-video_controller_jpeg_encoder Downloaded：0: ip-cores-video_controller_jpeg_encoder
Date : 2025-05-19 Size : 2.11mb User : lovers2015
ANUPimage2coe Downloaded：0: image to coe converter
Date : 2025-05-19 Size : 1kb User : LEON2333
Half-Adder Downloaded：0: This is an example to implement an Half-adder for xilinx FPGA
Date : 2025-05-19 Size : 21kb User : DanCerv
Half-Adder Downloaded：0: Half- adder 1- bit design implemented in ISE XIlinx Design Suite. Module in VHDL language
Date : 2025-05-19 Size : 21kb User : DanCerv
lcd显示驱动 Downloaded：0: Understand the principle of LCD driver; Use Xilinx Starter3E development board; On the development board LCD display "EDA curriculum design student name xxx student ID xxx" words, a loop display and mobile features.
Date : 2025-05-19 Size : 1.45mb User : 天是远的

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