VHDL-FPGA-Verilog List Page 1316

VHDL-FPGA-Verilog list

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lcd_driver Downloaded：0: in 1602 LCD module display on a string, including the first line shows "Welcom to hx" In the second row shows "www.mcuhx.com
Date : 2025-08-27 Size : 2kb User : xuyawang
div_5 Downloaded：0: language to write fifth frequency circuit, the duty cycle of 50
Date : 2025-08-27 Size : 170kb User : le
four_adder Downloaded：0: Four full adder function is achieved by calling the module is instantiated
Date : 2025-08-27 Size : 1kb User : 王泉
SAYEH Downloaded：0: cpu in verilog description. include C language source
Date : 2025-08-27 Size : 319kb User : 赵亮
fpga_msp430 Downloaded：0: Fpga and msp430 in communication，Including the communication protocol between them
Date : 2025-08-27 Size : 1kb User :
jishuqi Downloaded：0: In fpga experimental edition to realize four 7 period of digital tube dynamic display, digital increasing
Date : 2025-08-27 Size : 1kb User : xyleader
fpga_test Downloaded：0: This procedure used to test fpga and msp430 single chip microcomputer communication is correct
Date : 2025-08-27 Size : 1kb User : xyleader
autoseller Downloaded：0: autoseller machine is the main function of the code with the language of verilog. it is accomplished with the state machine.
Date : 2025-08-27 Size : 322kb User : LI
FIFO Downloaded：0: FIFO is accomplished with the code which is written using the language of verilog.FIFO is the means of first output while first input
Date : 2025-08-27 Size : 61kb User : LI
LED-VARIETY Downloaded：0: Water to achieve the four lights display, suitable for beginners to learn the circuit is simple, easy to understand
Date : 2025-08-27 Size : 1.48mb User : 周勇涛
led Downloaded：0: Control of a light-emitting diode light-emitting eight light-emitting diodes, the other seven light-emitting diodes for the cut-off state, light-emitting diode conduction order in accordance with the left or right move i
Date : 2025-08-27 Size : 2kb User : 胡听
full_adder Downloaded：0: full adder
Date : 2025-08-27 Size : 1kb User : liuchuan

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