VHDL-FPGA-Verilog List Page 1311

VHDL-FPGA-Verilog list

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133545 Downloaded：0: To such precision digital frequency the meter use VERILO language, we can s
Date : 2025-08-27 Size : 225kb User : 夏滢
124 Downloaded：0: And other precision digital frequency meter, Dalian University of Technology Innovation Institute, take a look at it
Date : 2025-08-27 Size : 31kb User : 夏滢
vga Downloaded：0: vga vhdl language to display a picture, have a complete engineering and source code, download the verification (note the hardware differences)
Date : 2025-08-27 Size : 677kb User : liezhuo
E2_4_SimSigPrduce Downloaded：0: mixer come ture 625khz*625khz
Date : 2025-08-27 Size : 1kb User : eleman
num-seven Downloaded：0: 16 bit adder
Date : 2025-08-27 Size : 2kb User : 郑夏天
CY7C68013-GPIF-PA0-PA1 Downloaded：0: The VC control CY7C68013 pulse issue, PA0 \ PA1 issued
Date : 2025-08-27 Size : 4.13mb User : l
timer Downloaded：0: By use Nios_II environment, a timer interrupt applications.
Date : 2025-08-27 Size : 2.14mb User : 林生
processor Downloaded：0: Through the verilog language programming simple microprocessor, simple addition and subtraction, and copy functions.
Date : 2025-08-27 Size : 274kb User : 林生
untitled3 Downloaded：0: Basketball 24 second timer 24 seconds, every 24 seconds a buzzer alarm
Date : 2025-08-27 Size : 6kb User : furong
Bin2Bcd Downloaded：0: If we want to achieve any number displayed on the LED, such as 201111, it internally in binary form there, I want to show the six seven-segment LED display lights on 2,0,1,1,1,1, This code is able to achieve this functio
Date : 2025-08-27 Size : 100kb User : 刘艳竹
ucos_led Downloaded：0: This a project built with sopc utilize a transplant ucosII operating system, two led simultaneously bright
Date : 2025-08-27 Size : 284kb User : 刘艳竹
niosii-triple-speed-ethernet Downloaded：1: This is an engineering sopc structures, triple-speed Ethernet transmission. The Developer Edition is 3c120
Date : 2025-08-27 Size : 5.09mb User : 刘艳竹

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