VHDL-FPGA-Verilog List Page 1275

VHDL-FPGA-Verilog list

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DeathRoad Downloaded：0: traffic light controller.
Date : 2025-08-26 Size : 592kb User : nahum
abc Downloaded：0: The bus control for embedded systems fpga communication products, mainly used for optical time domain reflectometer
Date : 2025-08-26 Size : 1kb User : 朱怀安
xors_1 Downloaded：0: this xor gate in vhdl run under active hdl
Date : 2025-08-26 Size : 12kb User : sag
mux2 Downloaded：0: this is multiplexer gate in vhdl run under active hdl
Date : 2025-08-26 Size : 12kb User : sag
adder Downloaded：0: tis an adder code in vhdl
Date : 2025-08-26 Size : 11kb User : sag
cary_generation Downloaded：0: cary generation code in vhdl
Date : 2025-08-26 Size : 13kb User : sag
carry_ripple_adder Downloaded：0: carry ripple adder vhdl code
Date : 2025-08-26 Size : 14kb User : sag
alu_with_component Downloaded：0: Arithmetic logic unit in vhdl
Date : 2025-08-26 Size : 18kb User : sag
tswc_state Downloaded：0: 8-bit shift register, state machine control can diode left, right, light and dark flashing alternately.
Date : 2025-08-26 Size : 1.25mb User : 杨佳文
verilog_example Downloaded：0: The verilog small collection of programs suitable for beginners to learn reference
Date : 2025-08-26 Size : 6kb User : 夏洪超
clock_for_6.0 Downloaded：0: Electronic bell, development environment based on FPGA Quartus II 6.0. The function is the three buttons to set the hour, minute and second. Usually as courses designed for students to reference to
Date : 2025-08-26 Size : 540kb User : 小白
edayima Downloaded：0: 3-8 decoder in VHDL, and its quartus ii waveform simulation files
Date : 2025-08-26 Size : 209kb User : chenjiaqi

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