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simply introduce the building of SOPC control system.
Date : 2025-08-22 Size : 9.75mb User : candor zhang

Multifunction electronic table. Code in detail, explain. Have been tested. Ti' s FPGA.
Date : 2025-08-22 Size : 467kb User : candor zhang

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Screensavers and playing the game. Suitable for students of the entry. Very interesting experiment. Code explained in detail. Has been verified. TI' s FPGA
Date : 2025-08-22 Size : 2.78mb User : candor zhang

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K8051 microcontroller in by the the VQM original code (Verilog Quartus Mapping File) expression, can under in QuartusII environment with VHDL, Verilog and other hardware description language mixed compile comprehensive a
Date : 2025-08-22 Size : 146kb User : zyb

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FPGA design a pwm waveform generator, language VHDL
Date : 2025-08-22 Size : 1.94mb User : liuxing

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spartan3 controls chip AD9512 divider Settings through the SPI protocol
Date : 2025-08-22 Size : 2kb User : ddyyss

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- Function: 4 kinds of common sine, triangle, sawtooth, square wave (A, B) the frequency, amplitude controllable output (square wave- A duty cycle is controlled), can store arbitrary waveform characteristics data and be
Date : 2025-08-22 Size : 11kb User : 陈伟杰

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Stepper motor positioning control system procedures and VHDL simulation procedures detailed notes
Date : 2025-08-22 Size : 5kb User : 陈伟杰

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Function: Cymometer. Automatically according to seven decimal counting results, dynamic display automatically select valid data- 4 4. Decimal point one thousand KHz.
Date : 2025-08-22 Size : 98kb User : 陈伟杰

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: Based on the VHDL language, ADC0809 simple control- Description: ADC0809 no internal clock, an external clock signal of 10KHz ~ 1290Hz, by the Department of the FPGA- the system clock (50MHz) after divided by 256 the g
Date : 2025-08-22 Size : 4kb User : 陈伟杰

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Write their own program on the SRAM read and write, the first to write read write read out correctly, the LED lights. The chip for ISSI25616, suitable for novice to do a simple test of SRAM do not understand.
Date : 2025-08-22 Size : 201kb User : xiexin

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program vhdl bcd to 7segment altera de2
Date : 2025-08-22 Size : 255kb User : elen
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