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VHDL-FPGA-Verilog list
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VHDLclock
Downloaded:0
Clock manually school, the whole point timekeeping, alarm clock function
Date
: 2025-08-21
Size
: 360kb
User
:
陈大伟
VHDLshipincaijixitong
Downloaded:0
Use of the ALTIUM DESIGNER designed a CMOS camera acquisition system, the MIPS processor, IIC controllers, the AD video interface, LCD controller, SRAM control in this system will be embedded into the FPGA internal funct
Date
: 2025-08-21
Size
: 503kb
User
:
陈大伟
VHDLyinpincaijixitong
Downloaded:0
Patients using the ALTIUM design a digital reverberation system, the system controllable MIPS processor, IIS controller, SPI controller, SRAM control will be embedded into the FPGA internal functional structure of Figure
Date
: 2025-08-21
Size
: 828kb
User
:
陈大伟
greedy_snake_vhdl
Downloaded:0
Battle using VHDL Snake games, support the serial realization of online battle
Date
: 2025-08-21
Size
: 690kb
User
:
Zhang Le
I2C_EEPROM
Downloaded:0
EEPROM_I2C Verilog
Date
: 2025-08-21
Size
: 4.52mb
User
:
刘栋
verilog
Downloaded:0
verilog HDL
Date
: 2025-08-21
Size
: 3kb
User
:
刘进
Verilog
Downloaded:0
VERILOG HDL
Date
: 2025-08-21
Size
: 86kb
User
:
刘进
add8
Downloaded:0
VHDL 8-bit data addition, the completion method for experimental schematic structures directly.
Date
: 2025-08-21
Size
: 1kb
User
:
李帅
ft2232h_rollback
Downloaded:0
FT2232H the chips usb cycle read and write verilog achieve
Date
: 2025-08-21
Size
: 1kb
User
:
123
aes
Downloaded:0
aes encryption algorithm of Verilog language (top-level code, compile, no error)
Date
: 2025-08-21
Size
: 5kb
User
:
shilei
DE2_70_TV
Downloaded:0
de2 70 development board demo program, verilog language written, video input and output
Date
: 2025-08-21
Size
: 177kb
User
:
chris
s-box
Downloaded:0
Verilog language description des s box (des s box Verilog code)
Date
: 2025-08-21
Size
: 9kb
User
:
shilei
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.65
.66
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1170
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.72
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.74
.75
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4310
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