VHDL-FPGA-Verilog List Page 1099

VHDL-FPGA-Verilog list

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lcd Downloaded：0: FPGA control word written on the LCD screen, and displayed on the LCD screen a string This is a test
Date : 2025-08-18 Size : 3.03mb User : mingzhanghui
seven_color Downloaded：0: FPGA generate seven vertical color bar are seven basic colors. And display monitor to the VGA port
Date : 2025-08-18 Size : 3.26mb User : mingzhanghui
div_clk Downloaded：0: A 20M to 16M clock frequency applet. There are some loopholes Please correct itself
Date : 2025-08-18 Size : 1kb User : yang
pri_encoder_using_if Downloaded：0: encoder using if - verilog
Date : 2025-08-18 Size : 1kb User : amin
decoder_using_with Downloaded：0: decoder_using_with verilog code
Date : 2025-08-18 Size : 1kb User : amin
EDA Downloaded：0: 4 decimal counter+7 of segment LED display
Date : 2025-08-18 Size : 663kb User : 陈旭纯
product-Altera Downloaded：0: altera products for selecting
Date : 2025-08-18 Size : 5.03mb User : 惠言
Digital_Clock Downloaded：0: The FPGA digital clock perfect pass the test. The target board is ZRTECH EP2C5T144C8 CORE2-5U core board and PERI1-8KD supporting daughter card.
Date : 2025-08-18 Size : 582kb User : 午后薄荷
sdram Downloaded：0: The SDRAM control procedures! Verilog language, has been transferred through!
Date : 2025-08-18 Size : 2.49mb User : 刘晓青
DA_TLC56201 Downloaded：0: FPGA-based application Verilog HDL language DA_TLC5620 chip, the corresponding function of the source.
Date : 2025-08-18 Size : 1.74mb User : wangyanwei
LCD12864 Downloaded：0: The FPGA control with a character type 12864, the program uses state machine state flip
Date : 2025-08-18 Size : 618kb User : chen
hanzi0430 Downloaded：0: Repeated 16x16 dot matrix rolling display the source code of Chinese characters based on the FPGA chip,
Date : 2025-08-18 Size : 375kb User : wangyanwei

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