Embeded-SCM Develop List Page 2469

Embeded-SCM Develop list

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CC2530zhongduankongzhiLSD Downloaded：0: CC2530 external interrupt control water lights annex documentation
Date : 2025-08-23 Size : 240kb User : 胡
zigbee-stack-kongzhideng Downloaded：0: Stack workflow and radio control LED Accessories documentation
Date : 2025-08-23 Size : 28.26mb User : 胡
zigbee-stack-touchuan Downloaded：0: 12. Serial node transparent transmission of information to send and receive attachments documentation
Date : 2025-08-23 Size : 16.61mb User : 胡
chengxu Downloaded：0: Hardware curriculum design- Traffic Management System (Found Effective)
Date : 2025-08-23 Size : 4kb User : WXY
PS2_ctrl Downloaded：0: (1) the input clock frequency division, get 190Hz and 25Hz clock signal, provided to other modules as the time Clock input (2) keyboard scan module: receive the keyboard input PS2C and PS2D, and get the keyboard scan cod
Date : 2025-08-23 Size : 423kb User : panda
chengxu Downloaded：0: Computer Control Curriculum design- incubator temperature control (measurement valid)
Date : 2025-08-23 Size : 4kb User : WXY
VGA_disp Downloaded：0: Clk divid module for the frequency circuit, the 50MHz system clock frequency to produce 50M/7Hz pixel clock. VGA control module for the VGA display control circuit module, driven by the pixel clock in the first line-freq
Date : 2025-08-23 Size : 1.2mb User : panda
traffic-light Downloaded：0: (1) Divid module: 1Hz divider module, the development board provides 50MHz system clock, and the design of traffic lights Conversion in seconds for the time unit, the 50MHz frequency to be 1Hz pulse signal. (2) Divid_200
Date : 2025-08-23 Size : 521kb User : panda
sin_en Downloaded：0: DDS by the phase increment, phase accumulator, quantizer and sine and cosine lookup table of four parts. The phase accumulator accumulates a fixed phase value for each period, and then finds the corresponding value the l
Date : 2025-08-23 Size : 2.59mb User : panda
clock Downloaded：0: VHDL language with the design of digital clock, in the digital display minutes and seconds, and can manually adjust the minutes, To achieve the increase or decrease minutes. The design includes the following sections: (1
Date : 2025-08-23 Size : 484kb User : panda
Fibonacci Downloaded：0: (1) clkdiv module: the 50MHz system clock frequency, were 190Hz, 3Hz signal. The 190 Hz signal is used to dynamically scan the module bit signal and the 3 Hz signal is used for the fib module. (2) fib module: According t
Date : 2025-08-23 Size : 652kb User : panda
car Downloaded：0: Self-balancing robot walk upright Codes (effective pro-test), which stands upright on the car control and speed control (no direction control)
Date : 2025-08-23 Size : 10.82mb User : WXY

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