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Title: 8bit-freqDetect Download
  • Category:
  • Other systems
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  • File Size:
  • 137kb
  • Update:
  • 2019-06-19
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  • Uploaded by:
  • 鹏jjjjj
 Description: Topic 1: Design a simple frequency meter with 8 digits display. Requirement: It can test 10 Hz ~ 10 MHz square wave signal. (2) The reference clock input by the circuit is 1Hz, which requires the measured value to be output in the form of 8421BCD code. (3) The system has reset keys; (4) The design is based on Verilog HDL with the method of hierarchical module. Write out the test simulation program
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FilenameSizeDate
8bit-freqDetect 0 2019-06-19
8bit-freqDetect\contral.v 788 2018-04-25
8bit-freqDetect\control_test.v 397 2018-04-25
8bit-freqDetect\counter.v 646 2017-07-05
8bit-freqDetect\counter_test.v 493 2017-07-05
8bit-freqDetect\freqDetect.cr.mti 2241 2018-05-24
8bit-freqDetect\freqDetect.mpf 82293 2018-05-24
8bit-freqDetect\lacth_test.v 605 2017-07-05
8bit-freqDetect\latch.v 710 2017-07-05
8bit-freqDetect\test_top.v 533 2018-04-25
8bit-freqDetect\top.v 1619 2018-04-25
8bit-freqDetect\vsim.wlf 81920 2018-05-24
8bit-freqDetect\work 0 2019-05-31
8bit-freqDetect\work\control 0 2019-05-31
8bit-freqDetect\work\control\verilog.asm 5232 2018-05-24
8bit-freqDetect\work\control\verilog.rw 294 2018-05-24
8bit-freqDetect\work\control\_primary.dat 954 2018-05-24
8bit-freqDetect\work\control\_primary.dbs 1090 2018-05-24
8bit-freqDetect\work\control\_primary.vhd 367 2018-05-24
8bit-freqDetect\work\control_test 0 2019-05-31
8bit-freqDetect\work\control_test\_primary.dat 521 2018-05-24
8bit-freqDetect\work\control_test\_primary.dbs 818 2018-05-24
8bit-freqDetect\work\control_test\_primary.vhd 257 2018-05-24
8bit-freqDetect\work\counter 0 2019-05-31
8bit-freqDetect\work\counter\verilog.asm 4824 2018-05-24
8bit-freqDetect\work\counter\verilog.rw 268 2018-05-24
8bit-freqDetect\work\counter\_primary.dat 681 2018-05-24
8bit-freqDetect\work\counter\_primary.dbs 787 2018-05-24
8bit-freqDetect\work\counter\_primary.vhd 367 2018-05-24
8bit-freqDetect\work\counter_test 0 2019-05-31
8bit-freqDetect\work\counter_test\_primary.dat 666 2018-05-24
8bit-freqDetect\work\counter_test\_primary.dbs 1061 2018-05-24
8bit-freqDetect\work\counter_test\_primary.vhd 84 2018-05-24
8bit-freqDetect\work\freq@detect 0 2019-05-31
8bit-freqDetect\work\freq@detect\verilog.asm 14520 2018-05-24
8bit-freqDetect\work\freq@detect\verilog.rw 87 2018-05-24
8bit-freqDetect\work\freq@detect\_primary.dat 1904 2018-05-24
8bit-freqDetect\work\freq@detect\_primary.dbs 3061 2018-05-24
8bit-freqDetect\work\freq@detect\_primary.vhd 721 2018-05-24
8bit-freqDetect\work\freq@detect_tb 0 2019-05-31
8bit-freqDetect\work\freq@detect_tb\verilog.asm 7816 2018-05-24
8bit-freqDetect\work\freq@detect_tb\verilog.rw 616 2018-05-24
8bit-freqDetect\work\freq@detect_tb\_primary.dat 722 2018-05-24
8bit-freqDetect\work\freq@detect_tb\_primary.dbs 1207 2018-05-24
8bit-freqDetect\work\freq@detect_tb\_primary.vhd 370 2018-05-24
8bit-freqDetect\work\lacth_test 0 2019-05-31
8bit-freqDetect\work\lacth_test\_primary.dat 1057 2018-05-24
8bit-freqDetect\work\lacth_test\_primary.dbs 1786 2018-05-24
8bit-freqDetect\work\lacth_test\_primary.vhd 80 2018-05-24
8bit-freqDetect\work\latch 0 2019-05-31
8bit-freqDetect\work\latch\verilog.asm 10256 2018-05-24
8bit-freqDetect\work\latch\verilog.rw 426 2018-05-24
8bit-freqDetect\work\latch\_primary.dat 959 2018-05-24
8bit-freqDetect\work\latch\_primary.dbs 1666 2018-05-24
8bit-freqDetect\work\latch\_primary.vhd 1207 2018-05-24
8bit-freqDetect\work\_info 3627 2018-05-24
8bit-freqDetect\work\_temp 0 2018-05-24
8bit-freqDetect\work\_vmake 26 2018-05-24
8bit-freqDetect\~$实验一.docx 162 2019-06-19
8bit-freqDetect\波形图.PNG 87871 2018-05-24

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