proiect shift registers
.......................\Lab 26.pdf
.......................\Shift Registers.doc
.......................\Shift Registers.docx
.......................\shreg
.......................\.....\.lso
.......................\.....\pepExtractor.prj
.......................\.....\results.txt
.......................\.....\sgreg_serial_paralel_load_vhdl_tbw.ant
.......................\.....\sgreg_serial_paralel_load_vhdl_tbw.fdo
.......................\.....\sgreg_serial_paralel_load_vhdl_tbw.jhd
.......................\.....\sgreg_serial_paralel_load_vhdl_tbw.tbw
.......................\.....\sgreg_serial_paralel_load_vhdl_tbw.udo
.......................\.....\sgreg_serial_paralel_load_vhdl_tbw.xwv
.......................\.....\sgreg_serial_paralel_load_vhdl_tbw.xwv_bak
.......................\.....\sgreg_serial_paralel_load_vhdl_tbw_wave.fdo
.......................\.....\shreg.ise
.......................\.....\shreg.restore
.......................\.....\shreg_sch.cmd_log
.......................\.....\shreg_sch.fdo
.......................\.....\shreg_sch.jhd
.......................\.....\shreg_sch.sch
.......................\.....\shreg_sch.udo
.......................\.....\shreg_sch.vhf
.......................\.....\shreg_sch_wave.fdo
.......................\.....\shreg_serial_paralel_load_sch.cmd_log
.......................\.....\shreg_serial_paralel_load_sch.jhd
.......................\.....\shreg_serial_paralel_load_sch.sch
.......................\.....\shreg_serial_paralel_load_sch.udo
.......................\.....\shreg_serial_paralel_load_sch.vhf
.......................\.....\shreg_serial_paralel_load_sch_wave.fdo
.......................\.....\shreg_serial_paralel_load_tbw.ant
.......................\.....\shreg_serial_paralel_load_tbw.fdo
.......................\.....\shreg_serial_paralel_load_tbw.jhd
.......................\.....\shreg_serial_paralel_load_tbw.tbw
.......................\.....\shreg_serial_paralel_load_tbw.udo
.......................\.....\shreg_serial_paralel_load_tbw.xwv
.......................\.....\shreg_serial_paralel_load_tbw.xwv_bak
.......................\.....\shreg_serial_paralel_load_tbw_bencher.prj
.......................\.....\shreg_serial_paralel_load_tbw_wave.fdo
.......................\.....\shreg_serial_paralel_load_vhdl.prj
.......................\.....\shreg_serial_paralel_load_vhdl.stx
.......................\.....\shreg_serial_paralel_load_vhdl.udo
.......................\.....\shreg_serial_paralel_load_vhdl.vhd
.......................\.....\shreg_serial_paralel_load_vhdl.xst
.......................\.....\shreg_serial_paralel_load_vhdl_vhdl.prj
.......................\.....\shreg_serial_paralel_load_vhdl_wave.fdo
.......................\.....\shreg_tbw.ant
.......................\.....\shreg_tbw.fdo
.......................\.....\shreg_tbw.jhd
.......................\.....\shreg_tbw.tbw
.......................\.....\shreg_tbw.udo
.......................\.....\shreg_tbw.xwv
.......................\.....\shreg_tbw.xwv_bak
.......................\.....\shreg_tbw_bencher.prj
.......................\.....\shreg_tbw_wave.fdo
.......................\.....\shreg_univ.fdo
.......................\.....\shreg_univ.prj
.......................\.....\shreg_univ.stx
.......................\.....\shreg_univ.udo
.......................\.....\shreg_univ.vhd
.......................\.....\shreg_univ.xst
.......................\.....\shreg_univ_tbw.ant
.......................\.....\shreg_univ_tbw.fdo
.......................\.....\shreg_univ_tbw.jhd
.......................\.....\shreg_univ_tbw.tbw
.......................\.....\shreg_univ_tbw.udo
.......................\.....\shreg_univ_tbw.vhw
.......................\.....\shreg_univ_tbw.xwv
.......................\.....\shreg_univ_tbw.xwv_bak
.......................\.....\shreg_univ_tbw_bencher.prj
.......................\.....\shreg_univ_tbw_wave.fdo
.......................\.....\shreg_univ_vhdl.prj
.......................\.....\shreg_univ_wave.fdo
.......................\.....\shreg_vhdl.prj
.......................\.....\shreg_vhdl.stx
.