Description: : Sine wave generator routine, including a direct digital synthesizer (DDS), as well as the application of the principle of frequency control CPLD generated sinusoidal signal frequency.
To Search:
- [mySPWM] - SPWM inverter simulation map, has passed
- [sin] - Quartus II 5.0 on the preparation of the
- [dds] - FPGA realization of the use of DDS, sine
- [DIY-AVR_USB_JTAGICE-ATmega16] - DIY AVR_USB_JTAGICE ATmega16
- [RandNum] - The use of C language random number gene
- [DDSckkc] - To the Direct Digital Synthesis (DDS) as
- [DDS] - In Quartus using VHDL procedures for the
- [vhdl_dds] - VHDL language using a simple DDS, easy t
- [sinbo] - Based quartus II of the sine wave genera
File list (Check if you may need any files):
example10
.........\db
.........\..\dds.db_info
.........\..\dds.eco.cdb
.........\..\dds.sld_design_entry.sci
.........\dds(1).cdf
.........\dds(1).done
.........\dds(1).dpf
.........\dds(1).pin
.........\dds(1).pof
.........\dds(1).qpf
.........\dds(1).qsf
.........\dds(1).qws
.........\dds(1).vhd
.........\dds.asm(1).rpt
.........\dds.asm.rpt
.........\dds.cdf
.........\dds.done
.........\dds.dpf
.........\dds.fit(1).rpt
.........\dds.fit(1).smsg
.........\dds.fit(1).summary
.........\dds.fit.rpt
.........\dds.fit.smsg
.........\dds.fit.summary
.........\dds.flow(1).rpt
.........\dds.flow.rpt
.........\dds.map(1).rpt
.........\dds.map(1).summary
.........\dds.map.rpt
.........\dds.map.summary
.........\dds.pin
.........\dds.pof
.........\dds.qpf
.........\dds.qsf
.........\dds.qws
.........\dds.tan(1).rpt
.........\dds.tan(1).summary
.........\dds.tan.rpt
.........\dds.tan.summary
.........\dds.vhd
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