Search - stopwatch

[SCM] timer

Description: 秒表/时钟计时器的设计采用AT89C52单片机，最小化应用设计；采用共阳七段LED显示器，P0口输出段码数据，P2.0-P2.5口作列扫描输出，P1.0、P1.1、P1.2口接三个按钮开关，用以调时及功能设置。为了提供共阳LED数码管的驱动电压，用三极管8550作电源驱动输出。-Stopwatch/Clock timer AT89C52 single-chip design, the smallest of the application of design the use of a total of Seven-Segment LED display Yang, P0 paragraph code output data, P2.0-P2.5 I make out scanning output, P1.0, P1.1, P1.2 I take three buttons switch to tune and when the feature set. In order to provide a total of Yang LED digital tube of driving voltage, using 8550 as the power transistor output driver.
Platform: | Size: 17408 | Author: 陈巍巍 | Hits:

[VHDL-FPGA-Verilog] miaobiao

Description: 完整的的倒计时秒表设计（指示带闪烁）ＶＨＤＬ代码，Ｑuartus 2开发环境，Archive文件，在Ｑuartus2解压即可。-Complete countdown stopwatch design (with flashing instructions) VHDL code, Quartus 2 development environment, Archive documents, in Quartus2 can extract.
Platform: | Size: 113664 | Author: 李淡 | Hits:

[assembly language] clock

Description: 基于单片机设计的数字钟的设计，该数字钟功能教齐全有整点报，８路闹钟设置，年月日显示，秒表记时功能．-Single-chip design based on the design of the digital clock, the digital clock function, a whole range teaching points, 8 alarm settings, date display, stopwatch timer functions.
Platform: | Size: 2324480 | Author: 张坤 | Hits:

[SCM] shuzizhong

Description: 基于at89s51单片机的数字钟程序有闹钟秒表等功能-AT89S51 MCU-based digital clock program has features such as alarm clock stopwatch
Platform: | Size: 5120 | Author: licheng | Hits:

[SCM] time

Description: 该程序能实现数字跑表，定点报时等功能。适用于AT89S52单片机。-The program can realize digital stopwatch, the time fixed-point functions. Applicable to single-chip AT89S52.
Platform: | Size: 2048 | Author: 潘水洋 | Hits:

[VHDL-FPGA-Verilog] stop_watch

Description: 采用Quartus2编写的电子秒表电路实现计时、暂停等功能-Quartus2 prepared using electronic stopwatch timer circuit, suspension and other functions
Platform: | Size: 349184 | Author: gz208 | Hits:

[assembly language] multifunctional_clock

Description: 此程序为多功能电子钟，功能强大。实现功能:定时功能，参数是0.00s~99H，最多可以同时定时11个时间。整点报时，闹钟，比赛计分器,省电模式,显示星期,红外遥控。秒表功能，最多可以存储11个瞬间时间。显示当前时间 -This procedure for the multi-functional electronic bell and powerful. Realize functions: timer function, parameter is 0.00s ~ 99H, up to 11 hours from time to time at the same time. The whole point timekeeping, alarm clock, a points race, and power-saving mode, showing a week, infrared remote control. Stopwatch function, can store up to 11 moments of time. Displays the current time
Platform: | Size: 23552 | Author: | Hits:

[assembly language] dig-clock

Description: 数字钟，定时亮灯，可作秒表，有年月日显示-Digital clock, timing lights, can be used for stopwatch, date display has
Platform: | Size: 19442688 | Author: 钱慕君 | Hits:

[J2ME] stopwatch-src

Description: 计时器 Run mode: * - stop 0 - switch on backlight # - suspend/resume joystick - set next result 1-9 - set result for member with this number Inspect mode: *,#,0 - reset and start UP,LEFT - show previous result 1-9 - show result for member with this number-Timer Run mode:*- stop0- switch on backlight#- Suspend/resumejoystick- set next result1-9- set result for member with this number Inspect mode:*,#, 0- reset and startUP, LEFT- show previous result 1-9- show result for member with this number
Platform: | Size: 20480 | Author: Vincent | Hits:

[SCM] jishujidanpianji

Description: 设计一个单片机控制的秒表系统。利用单片机的定时器/计数器定时和记数的原理，结合显示电路、LED数码管以及按键来设计计时器。将软、硬件有机地结合起来，使得系统能够正确地进行加、减（倒）计时，数码管能够正确地显示时间。-Design a single-chip control system stopwatch. The use of single-chip timer/counter timing and number of the principles in mind, combined with display circuit, LED digital tube, as well as to design the timer button. Will be software and hardware combination, the system can correctly add, subtract (down) time, digital tube able to correctly display the time.
Platform: | Size: 176128 | Author: dd | Hits:

[VHDL-FPGA-Verilog] kevin_timer

Description: FPGA 上的数字秒表及完整的显示功能。-FPGA digital stopwatch and complete display.
Platform: | Size: 1024 | Author: chen | Hits:

[Embeded-SCM Develop] 99sClockQQ64134703

Description: QQ64134703毕业设计基于AT89C51，用PROTEUS仿真实现的能计时99S的秒表。 -QQ64134703 graduation design is based on AT89C51, with PROTEUS simulation to realize the 99S of the stopwatch timer.
Platform: | Size: 26624 | Author: 无名 | Hits:

[VHDL-FPGA-Verilog] secondwatch

Description: 用VERILOG实现的秒表用VERILOG实现的秒表-Realized by Verilog Verilog achieved using a stopwatch stopwatch
Platform: | Size: 393216 | Author: wwyjs163 | Hits:

[VHDL-FPGA-Verilog] clock

Description: 数字秒表的设计，reset为归零设置，start为重新计时设置-Design of digital stopwatch, reset to zero settings, start time set for the re-
Platform: | Size: 309248 | Author: zhang | Hits:

[Windows Develop] CountdownTimer(VB)

Description: 用VB写的一个倒计时的秒表程序，很小巧而且非常实用。-Using VB to write a countdown stopwatch program, it is compact and very practical.
Platform: | Size: 23552 | Author: 寡人 | Hits:

[VHDL-FPGA-Verilog] wtut_ver

Description: verilog HDL语言编写的数字秒表，仿真已经通过，可供参考-verilog HDL language digital stopwatch, simulation has already been adopted, for reference
Platform: | Size: 26624 | Author: 邢继元 | Hits:

[VHDL-FPGA-Verilog] multifunction_digital_clock_based_on_fpga

Description: 基于FPGA的多功能数字钟的设计与实现内附有详尽的Verilog HDL源码，其功能主要有：时间设置，时间显示，跑表，分频，日期设置，日期显示等-FPGA-based multi-functional Digital Clock Design and Implementation of typhoons and rainstorms are detailed Verilog HDL source code, its functions include: time settings, time display, stopwatch, frequency, date setting, date display
Platform: | Size: 3293184 | Author: | Hits:

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list