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[VHDL-FPGA-Verilog] RS(32to28)encoderanddecoder

Description: RS(32,28) encoder and decoder VHDL-RS (32,28) encoder and decoder VHDL
Platform: | Size: 76800 | Author: 王文 | Hits:

[VHDL-FPGA-Verilog] reedsolomon

Description: reed solomon encoder synthesis and simulation is done using verilog and working fine
Platform: | Size: 1126400 | Author: priya | Hits:

[Other] rsencoder_latest.tar

Description: reed solomon encoder (255,239) verilog source code
Platform: | Size: 4096 | Author: 梅国强 | Hits:

[VHDL-FPGA-Verilog] rsencoder_latest.tar

Description: reed solomon encoder in verilog-reed solomon encoder in verilog
Platform: | Size: 4096 | Author: jagadesh | Hits:

[VHDL-FPGA-Verilog] reed_solomon_codec_generator.tar

Description: reed solomon encoder verilog code.-reed solomon encoder verilog code.
Platform: | Size: 1141760 | Author: tmanev | Hits:

[VHDL-FPGA-Verilog] rs_encoder

Description: reed solomon encoder used in DVB verilog code.
Platform: | Size: 5120 | Author: tmanev | Hits:

[Communication-Mobile] rs_15_11

Description: ReedSolomon RS(15,11) Verilog 编码和解码测试程序 编码有两种实现方式 串行和并行方式(ReedSolomon RS(15,11) Verilog Encoder&Decoder)
Platform: | Size: 14336 | Author: Ericxgj | Hits:

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