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[VHDL-FPGA-Verilogfifo

Description: 用双端口ram实现异步fifo,采用格雷码,避免产生毛刺。-Using dual-port ram realize asynchronous fifo, the use of Gray code, avoiding the production of burr.
Platform: | Size: 1024 | Author: shili | Hits:

[Driver DevelopRAMDISK

Description: Ramdisk 是一个用于演示纯软件的 Windows(r) 2000 设备驱动程序的示例。此驱动程序会创建一个指定大小的 RAM 盘。您可以像使用任何其他磁盘一样使用此 Ramdisk,但在您关闭计算机时该磁盘的内容会丢失。(一般来说,Windows(r) 2000 缓存管理器在优化内存使用方面比 Ramdisk 要好得多。)-Ramdisk is a pure software used for demonstration of Windows (r) 2000 device driver sample. This driver creates a RAM disk of specified sizes. You can use any other disk as the same as using the Ramdisk, but when you shut down your computer the contents of the disk will be lost. (Generally speaking, Windows (r) 2000 cache management in optimizing the memory usage much better than Ramdisk.)
Platform: | Size: 24576 | Author: tony zhao | Hits:

[SCM62256

Description: MSC-51系列单片机内有128B或256B的RAM数据存储器,对一般应用场合,内部 RAM可以满 足系统对数据存储器的要求,但对需要大容量数据缓冲器的应用系统(如数据采集系统),仅片内的RAM存储器往往不够用,这种情况下,就需要在单片机外部扩展数据存储器。 MSC-51与外部数据存储器的一般连接方法:外部数据存储器的高8位地址由P2口提供,低8位地址线接地址锁存器的输出端。外部RAM的读、写控制信号分别接MCS-51的 、 。外部RAM的片选信号可由P2口未用的地址线的剩余口线以线选方式或译码方式提供。 随机存贮芯片(RAM)HM62256的存贮量为32KB,地址线有(A0~A14),是单片机应用系统中最常见的数据存储器 -err
Platform: | Size: 89088 | Author: 金大鹏 | Hits:

[Embeded-SCM DevelopD1CPUTEST

Description: 通过对双口ram 操作判断硬件正确性,并在相应位置入标志来表示对错。-Dual-port ram through hardware to determine the correctness of the operation, and location in the corresponding entry signs to indicate right or wrong.
Platform: | Size: 1024 | Author: sdf168 | Hits:

[Windows Developram

Description: pic8680外阔RAM的c程序,经调试可以使用-RAM width pic8680 outside the c procedures can be used by the debugger
Platform: | Size: 1024 | Author: caoyang | Hits:

[DSP programRAMTest

Description: DSK6713的RAM测试程序 可以用来做为DSK6713开发前的测试和学习熟悉DSK6713的RAM程序来用-DSK6713 the RAM test procedure can be used as a test before DSK6713 development and learning DSK6713 familiar with procedures for using the RAM
Platform: | Size: 390144 | Author: 乔凯庆 | Hits:

[VHDL-FPGA-VerilogRAMtestbench

Description: 双口Ram的VHDL Testbench-Dual-Port Ram s VHDL Testbench
Platform: | Size: 1024 | Author: 赵国栋 | Hits:

[Embeded-SCM Developffsample

Description: 超轻量级的嵌入式文件系统,只需要1k ram 有源文件而且有丰富的应用实例,avr pic 等-Ultra-lightweight embedded file system, only the active document 1k ram and has a wealth of application examples, avr pic, etc.
Platform: | Size: 384000 | Author: 郑磊 | Hits:

[VHDL-FPGA-Verilogramvhdllib_06

Description: The Free IP Project VHDL Free-RAM Core-The Free IP ProjectVHDL Free-RAM Core
Platform: | Size: 615424 | Author: cathy | Hits:

[SCMDPRamComm

Description: 基于双口RAM的单片机间通信 从书上摘抄的,仅供参考-Based on the single-chip dual-port RAM communication excerpt from the book, and for reference only
Platform: | Size: 2048 | Author: sun | Hits:

[SCMDPRam_Comm

Description: 基于双口RAM的单片机间通信 从书上摘抄的,仅供参考-Based on the single-chip dual-port RAM communication excerpt from the book, and for reference only
Platform: | Size: 2048 | Author: sun | Hits:

[ARM-PowerPC-ColdFire-MIPSARMv4

Description: 三星44b0的pcb图,cpu、ram以及flash合理分布,电磁抗干扰性能较好。-Samsung 44b0 of pcb map, cpu, ram and flash reasonable distribution, electromagnetic interference performance better.
Platform: | Size: 153600 | Author: august | Hits:

[assembly languageRAM_TEST

Description: 这是一个测试64K RAM 的小程序,希望对大家硬件调试有点作用。(51汇编)-This is a test 64K RAM small program, I hope all of you a bit role in the hardware debugger. (51 compilation)
Platform: | Size: 1024 | Author: zzw_zhang | Hits:

[VHDL-FPGA-Verilogref-ddr-sdram-vhdl

Description: 基于VHDL编写的DDR-SDRAM控制器的编程,目前是业界常用的RAM控制器-VHDL prepared based on the DDR-SDRAM controller programming, is currently the industry s commonly used RAM controller
Platform: | Size: 1031168 | Author: wfs | Hits:

[Software Engineering20060510191318991

Description: ALTERA公司DDR ram controller资料-ALTERA company DDR ram controller information
Platform: | Size: 2253824 | Author: 盛雪飞 | Hits:

[VHDL-FPGA-Verilogram

Description: 存储器模块生成,采用16位数据总线,5位读写地址总线,异步清零!-Memory modules generated, using 16-bit data bus, 5 to read and write address bus, asynchronous Clear!
Platform: | Size: 2048 | Author: 齐磊 | Hits:

[Embeded-SCM DevelopDS1302

Description: DS1302 是 DALLAS 公司推出的涓流充电时钟芯片 内含有一个实时时钟/日历和 31 字节静态 RAM 通过简 单的串行接口与单片机进行通信 实时时钟/日历电路提供秒 分 时 日 日期 月 年的信息 每月的天 数和闰年的天数可自动调整 时钟操作可通过 AM/PM 指示决定采用 24 或 12 小时格式 DS1302 与单片机之 间能简单地采用同步串行的方式进行通信 仅需用到三个口线 1 RES 复位 2 I/O 数据线 3 SCLK 串行时钟 时钟/RAM 的读/写数据以一个字节或多达 31 个字节的字符组方式通信 DS1302 工作时功耗很 低 保持数据和时钟信息时功率小于 1mW-DALLAS Introduces DS1302 is the trickle charge clock chip contains a real-time clock/calendar and 31-byte static RAM through a simple serial interface for communication with the single-chip real-time clock/calendar circuit to provide time-sharing on the date of seconds on-year information on the number of days per month and leap year the number of days can automatically adjust the clock to operate through the AM/PM instructions decided to adopt 24 or 12 hours format between DS1302 and SCM simple way of using synchronous serial communication only used three In line 1 RES reset I 2 I/O data lines 3 SCLK Serial Clock Clock/RAM read/write data to a byte or up to 31-byte character sets DS1302 way communications work to maintain a low-power data and clock information when power is less than 1mW
Platform: | Size: 192512 | Author: 李明 | Hits:

[DSP program2812RAM

Description: TMS320F2812读写外部RAM的C语言例程,TMS320F2812读写外部RAM的C语言例程-TMS320F2812 external RAM read and write the C language routines, TMS320F2812 external RAM read and write the C language routines
Platform: | Size: 36864 | Author: 王磊 | Hits:

[SCMidt71v30

Description: idt71v30使用说明书,高速双口RAM-dfdf
Platform: | Size: 97280 | Author: 大树 | Hits:

[DSP programEXRAM

Description: 基于C5402的外部RAM读写程序,用C编写,很好理解,-C5402 external RAM-based read and write procedures, using C to prepare, a good understanding,
Platform: | Size: 50176 | Author: 老欧 | Hits:
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