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[DSP program] dual-ram

Description: 实现双口RAM映射到DSP地址单元空间中，使得双口RAM直接读取DSP中的数据或程序。-Achieve dual-port RAM modules mapped to the DSP address space, making dual-port RAM directly read the data in the DSP or procedures.
Platform: | Size: 2048 | Author: 王正刚 | Hits:

[VHDL-FPGA-Verilog] ram

Description: 基于altera ep2c8双口RAM -Altera ep2c8-based dual-port RAM
Platform: | Size: 884736 | Author: 秦学富 | Hits:

[Other Embeded program] ram

Description: LPC2378 读取RAM数据，好资料，值得一看-RAM data read LPC2378, good information, worth a visit
Platform: | Size: 207872 | Author: 高志安 | Hits:

[VHDL-FPGA-Verilog] ram

Description: ram的vhdl源代码在colloy实现-ram in the vhdl source code to achieve colloy
Platform: | Size: 1920000 | Author: mamou | Hits:

[VHDL-FPGA-Verilog] RAM

Description: 这是个双端口双端口ram的定义，当然读者在此基础上还可以扩充-This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded
Platform: | Size: 50176 | Author: lee | Hits:

[VHDL-FPGA-Verilog] RAM

Description: 用VHDL编写一个字长16位，容量128B的RAM控制实现程序，并进行设计综合和功能模拟 。含源程序，及实验要求。适合初学者学习使用。-VHDL prepared with a 16-bit word length, 128B of the RAM capacity to achieve process control and design of analog integrated and functional. Containing source code, and experimental requirements. Suitable for beginners learning to use.
Platform: | Size: 9216 | Author: 赵剑平 | Hits:

[SCM] RAM

Description: KEIL的μVision2版本，采用PHILIPS公司的P89V51单片机，32k的RAM:HM62256，段表不同类型的单片机以及接法不同需要重新修改，串口读取10个数据到RAM并数码管显示-KEIL the μVision2 version P89V51 the use of PHILIPS' s single-chip, 32k of RAM: HM62256, paragraph form, as well as different types of single-chip connection to the different needs modification, serial reader 10 and the digital data to display RAM
Platform: | Size: 19456 | Author: nonlz | Hits:

[DSP program] ram

Description: dsp2812 扩展RAM和实时时钟的读写、测试程序-dsp2812 extend RAM and RTC read /test
Platform: | Size: 574464 | Author: fanshengfang | Hits:

[Software Engineering] RAM

Description: 使用ISE的XST综合，综合结果使用了Block RAM，当然有时对于用到的容量很小的RAM，我们并不需要其使用Block RAM，那么只要稍微修改一下就可以综合成Distribute RAM-The use of ISE s XST synthesis, the combined result of the use of the Block RAM, it is our expectation. Of course, sometimes the capacity to use a very small RAM, we do not need its use Block RAM, as long as a slight change it can be integrated into Distribute RAM
Platform: | Size: 7168 | Author: 刘珊 | Hits:

[ARM-PowerPC-ColdFire-MIPS] ram

Description: 用FPGA做的RAM，源码，调试通过，有工程-FPGA to do with RAM, source code, debugging through, there are works
Platform: | Size: 452608 | Author: 马泽龙 | Hits:

[Windows Develop] RAM

Description: Code for designing 16 bit RAM
Platform: | Size: 9216 | Author: Magic | Hits:

[VHDL-FPGA-Verilog] ram

Description: 使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上用硬件描述语言实现一个RAM存储器。-The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 development board with hardware description language to achieve a RAM memory.
Platform: | Size: 198656 | Author: Daisy | Hits:

[assembly language] RAM

Description: 微机基本实验，RAM扩展实验，将字写进去再读出来显示-Basic computer experiments, RAM expansion experiments, the characters written into the read out display
Platform: | Size: 1024 | Author: Darren | Hits:

[Other] RAM

Description: 双口RAM Verilog描述 双口RAM Verilog描述-Dual-port RAM Verilog description of dual-port RAM Verilog description of dual-port RAM Verilog description of
Platform: | Size: 15360 | Author: 关键 | Hits:

[VHDL-FPGA-Verilog] RAM

Description: Ram with 8 bits implemented in vhdl verilog code
Platform: | Size: 3072 | Author: guilherme | Hits:

[Software Engineering] RAM-FPGA-FFT

Description: 内嵌RAM的种类，在FFT中的应用,以及仿真验证及应用-Types of embedded RAM, the FFT application
Platform: | Size: 125952 | Author: Dean | Hits:

[VHDL-FPGA-Verilog] RAM

Description: 单端口RAM，自己写的单端口RAM，同步写入同步读出，包括TESTBENCH和测试模拟文件-RAM
Platform: | Size: 1024 | Author: wang | Hits:

[Embeded-SCM Develop] RAM

Description: 调试运行程序RAM.ASM。对62256进行读写。若L1灯闪动，表示62256RAM读写正常。一直亮说明扩展数据存储器有损坏-Commissioning program RAM.ASM. Read and write to the 62256. If L1 lights flashing, that 62256RAM read normal. Light that has been extended data memory is damaged
Platform: | Size: 7168 | Author: qun | Hits:

[VHDL-FPGA-Verilog] 5-ge-ram-core

Description: 5个ram核，arm6_verilog,arm7_verilog_1,arm7_VHDL,Core_arm_VHDL,nnARM01_11_1_3 arm6_verilog.rar 一个最简单的arm内核，verilog写的，有点乱 arm7_verilog_1.rar J. Shin用verilog写的arm7核心，结构良好，简明易懂 nnARM01_11_1_3.zip.zip nnARM开源项目，国防科技大学牛人ShengYu Shen写的，原来放在opencores上，因为写得太好了，后被ARM公司封杀~~这里是目前我能找到的最终版本了~ Core_arm_VHDL.rar VHDL语言实现的arm内核，可以在http://www.opencores.org/project,core_arm下载到，不过还不是非常完整，有些小bug ARM7_VHDL.rar Ruslan Lepetenok用VHDL写的arm内核，也非常不错-5 ram nuclear, arm6_verilog, arm7_verilog_1, arm7_VHDL, Core_arm_VHDL, nnARM01_11_1_3 arm6_verilog.rar arm of a simple kernel, verilog to write, a bit messy arm7_verilog_1.rar J. Shin arm7 use verilog to write the core of well-structured, easily understandable nnARM01_11_1_3 . zip.zip nnARM open source projects, National Defense University cattle ShengYu Shen wrote, the original on the opencores, because so good, and after the ban, ARM ~ ~ Here is the final version I could find out ~ Core_arm_VHDL.rar VHDL language of the arm core, you can http://www.opencores.org/project, core_arm downloaded to, but not very complete, and some small bug ARM7_VHDL.rar Ruslan Lepetenok written in arm with VHDL core, but also very good
Platform: | Size: 1152000 | Author: YeZiqiang | Hits:

[VHDL-FPGA-Verilog] 256.16-RAM

Description: VHDL语言编写，实现256×16RAM块功能，稍加修改即可改变RAM块的容量-VHDL language, achieving 256 ×16RAM block .A little change can change the capacity of the block RAM
Platform: | Size: 266240 | Author: 王建伟 | Hits:
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