Search - pc fpga uart

[Other resource] new-lins-uart-all

Description: 无私奉献，VHDL 源码，用于实现FPGA上的UART(串口控制器)，可以实现FPGA与单片机，PC机的串口通讯。
Platform: | Size: 6282 | Author: 骑士 | Hits:

[VHDL-FPGA-Verilog] uart from opencores

Description: 用VHDL实现串口可以实现与pc机的通信收发中断都可以效果比较好-VHDL implement serial port, it can communicate with pc, it can accept and send message, and it can be interrupted.
Platform: | Size: 9216 | Author: 熊明 | Hits:

[VHDL-FPGA-Verilog] Exp6-VGA

Description: 通过UART从PC主机读取图片数据，并完成图片在VGA显示器上的显示-through UART from the host PC to read image data, and complete picture of the VGA display on the show
Platform: | Size: 681984 | Author: 萧飒 | Hits:

[VHDL-FPGA-Verilog] uart0vhdl

Description: vhdl实现fpga和PC机的简单通信(发送),-vhdl achieve fpga and PC simple communication (transmission),
Platform: | Size: 1024 | Author: 刘音 | Hits:

[VHDL-FPGA-Verilog] UART_ise7_bak

Description: 用FPGA 实现全双工异步串口（UART），与PC 机通信。1 位起始位；8 位数据位；一个停止位；无校验位；波特率为2400、4800、9600、11520 任选或可变（可用按键控制波特率模式）。-using FPGA full-duplex asynchronous serial port (UART), and PC communication. An initiation; 8 data spaces; One-stop; No Parity; Baud Rate for 2400,4800,9600, 11520 optional or variable (baud rate can be used to control keypad mode).
Platform: | Size: 32768 | Author: lee | Hits:

[SCM] new-lins-uart-all

Description: 无私奉献，VHDL 源码，用于实现FPGA上的UART(串口控制器)，可以实现FPGA与单片机，PC机的串口通讯。-Selfless dedication, VHDL source code for the FPGA realization of the UART (serial port controller), you can realize FPGA and MCU, PC serial communication machine.
Platform: | Size: 6144 | Author: 骑士 | Hits:

[VHDL-FPGA-Verilog] uart

Description: FPGA的串口模块，实现FPGA与PC机的串口通讯。-FPGA serial modules, FPGA implementation with the PC-Serial communication.
Platform: | Size: 472064 | Author: 王小 | Hits:

[Com Port] feng_rs0

Description: 基于FPGA的串口通信，PC给FPGA发送数据，FPGA收到数据并返回给PC-FPGA-based serial communications, PC to the FPGA to send data, FPGA Receive data and return to the PC
Platform: | Size: 305152 | Author: 王OO | Hits:

[Process-Thread] UART

Description: minimum uart Image for transfer image to FPGA then read again by PC
Platform: | Size: 409600 | Author: umar | Hits:

[VHDL-FPGA-Verilog] my_uart_top

Description: 实现的功能如题，就是FPGA里实现从PC接收数据，然后把接收到的数据发回去。使用的是串口UART协议进行收发数据。上位机用的是老得掉牙的串口调试助手-To achieve the functions such as title, that is, to achieve FPGA receives data from the PC, and then receive data back fat. Using a UART serial port protocol to send and receive data. PC using the old tooth out of the serial debugging assistant
Platform: | Size: 3072 | Author: 刘虎 | Hits:

[Com Port] uart

Description: 串口通讯 PC发送FPGA接受后回传 verilog语言-uart verilog
Platform: | Size: 3072 | Author: 赵云 | Hits:

[VHDL-FPGA-Verilog] uart

Description: uart-universal aynchronious reciever and transmitter used to connect the pc and fpga to pass the data
Platform: | Size: 3072 | Author: priya | Hits:

[VHDL-FPGA-Verilog] x3cs400_uart

Description: 基于X3cS400的串口通讯程序，开发环境ISE7.0，使用verilog编写。可以使用串口调试助手在pc机上查看字符。-UART communication program based on X3CS400 FPGA， develop enviroment： ISE7.0，completed by verilog。 The result could be seen on the Uart debug assitant.
Platform: | Size: 569344 | Author: lingfeng | Hits:

[VHDL-FPGA-Verilog] uart

Description: 利用串口调试助手是实现pc机和fpga的串口通信功能，程序附注释。-Debug Assistant is achieved using serial pc machine and fpga serial communication function, the program annotated.
Platform: | Size: 102400 | Author: 郝强 | Hits:

[VHDL-FPGA-Verilog] UART

Description: 利用FPGA接受232芯片的串口数据，可以与PC进行串口通信-FPGA chip using the serial data received 232, serial communication with PC
Platform: | Size: 1189888 | Author: 杨然 | Hits:

[Com Port] FPGA-RS232-verilog

Description: fpga上的串口驱动程序，包括接收主机来的数据（deserial）和发送由FPGA产生的数据(serial).该程序的调试需要借助串口调试助手-serial port driver on the fpga, including the receiving host to the data (deserial) and send the data generated by the FPGA (serial) to pc. The program needs the serial debug debugging assistant
Platform: | Size: 500736 | Author: yvaine | Hits:

[VHDL-FPGA-Verilog] IIC读写EEPROM发送到PC串口

Description: 能实现用IIC读EEPROM并且将读取的数据通过串口发送到PC端，以及在PC端通过串口发送数据给FPGA，再利用IIC将数据写入EEPROM(The program can realize that FPGA read the data from EEPROM by IIC and then send it to PC by UART,and that PC send the data to FPGA by UART and then write the data to EEPROM by IIC)
Platform: | Size: 246784 | Author: lml_234 | Hits:

[VHDL-FPGA-Verilog] ad706_test

Description: AD7606的FPGA驱动，AD7606与FPGA通过并行模式连接。FPGA可以将AD采集到的信号转换成电压信号通过串口输出，可通过PC机串口调试助手查看。实测可用(The drive program of AD7606 write by verilog. FPGA can convert the AD7606'sigal to volatage and send the converted signal to PC through uart.)
Platform: | Size: 14983168 | Author: Pgaf | Hits:

[VHDL-FPGA-Verilog] uart

Description: 此上传文件实现的功能就是FPGA里实现从PC接收数据，然后把接收到的数据发回去。使用的是串口UART协议进行收发数据。(The function of this upload file is to receive data from PC in FPGA and send back the received data.The serial port UART protocol is used to receive and receive data.)
Platform: | Size: 1649664 | Author: 木子桶 | Hits:

[VHDL-FPGA-Verilog] 中级篇03：UART，波特率115200与PC通信

Description: 本程序实现FPGA的串口通信功能，可以进行数字字符等的发送，波特率为115200(This program implements the serial communication function of the FPGA, and can transmit digital characters, etc., and the baud rate is 115200.)
Platform: | Size: 10554368 | Author: 小明d1 | Hits:

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[Other resource] new-lins-uart-all

[VHDL-FPGA-Verilog] uart from opencores

[VHDL-FPGA-Verilog] Exp6-VGA

[VHDL-FPGA-Verilog] uart0vhdl

[VHDL-FPGA-Verilog] UART_ise7_bak

[SCM] new-lins-uart-all

[VHDL-FPGA-Verilog] uart

[Com Port] feng_rs0

[Process-Thread] UART

[VHDL-FPGA-Verilog] my_uart_top

[Com Port] uart

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] x3cs400_uart

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] UART

[Com Port] FPGA-RS232-verilog

[VHDL-FPGA-Verilog] IIC读写EEPROM发送到PC串口

[VHDL-FPGA-Verilog] ad706_test

[VHDL-FPGA-Verilog] uart

[VHDL-FPGA-Verilog] 中级篇03：UART，波特率115200与PC通信

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