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[Other resource] 基于FPGA的数字信号显示系统软硬件设计

Description: 该文阐述了现场可编程逻辑器件FPGA的主要特点，应用FPGA芯片和VHDL硬件描述语言设计的模拟示波器数字信号显示系统的设计原理和设计方法。-this paper, the field programmable logic devices FPGA main feature FPGA chip and VHDL hardware description language design analog signals to digital oscilloscope system design principles Design and Methods.
Platform: | Size: 439454 | Author: 张志华 | Hits:

[Other resource] FPGA-based_oscilloscope

Description: FPGA-based_oscilloscope,VHDL写的实现 示波器的程序，及完整的工程描述文档-FPGA-based_oscilloscope. VHDL was oscilloscope to achieve the realization of the process, and complete the project description document
Platform: | Size: 228778 | Author: 严刚 | Hits:

[DSP program] 基于FPGA的数字信号显示系统软硬件设计

Description: 该文阐述了现场可编程逻辑器件FPGA的主要特点，应用FPGA芯片和VHDL硬件描述语言设计的模拟示波器数字信号显示系统的设计原理和设计方法。-this paper, the field programmable logic devices FPGA main feature FPGA chip and VHDL hardware description language design analog signals to digital oscilloscope system design principles Design and Methods.
Platform: | Size: 439296 | Author: 张志华 | Hits:

[VHDL-FPGA-Verilog] FPGA-based_oscilloscope

Description: FPGA-based_oscilloscope,VHDL写的实现 示波器的程序，及完整的工程描述文档-FPGA-based_oscilloscope. VHDL was oscilloscope to achieve the realization of the process, and complete the project description document
Platform: | Size: 228352 | Author: 严刚 | Hits:

[Embeded-SCM Develop] expt83_rsvscp

Description: 基于fpga和sopc的用VHDL语言编写的EDA数据采集电路和简易存储示波器-FPGA and SOPC based on the use of VHDL language EDA data acquisition circuit and simple storage oscilloscope
Platform: | Size: 26624 | Author: 多幅撒 | Hits:

[Embeded-SCM Develop] expt12_5_rsv

Description: 基于fpga和sopc的用VHDL语言编写的EDA采样高速A/D的存储示波器-FPGA and SOPC based on the use of VHDL language EDA sampling high-speed A/D of the storage oscilloscope
Platform: | Size: 58368 | Author: 多幅撒 | Hits:

[VHDL-FPGA-Verilog] osc

Description: 数字示波器的FPGA实现 VHDL编写 Quartus7.1测试通过-Digital Oscilloscope The FPGA realization of VHDL test preparation Quartus7.1
Platform: | Size: 2243584 | Author: 李星 | Hits:

[VHDL-FPGA-Verilog] EP1C3_12_5_RSV

Description: 基于ＦＰＧＡ的数字存储示波器，用ＶＨＤＬ实现的，压缩包里是Quartus工程。AD采样送进FPGA，存入SRAM后用DA在普通示波器上可以显示。-FPGA-based digital storage oscilloscope, using VHDL achieved compression is Quartus project bag. AD sample into FPGA, after SRAM into DA in ordinary oscilloscope can display.
Platform: | Size: 61440 | Author: deadtomb | Hits:

[Other] digitaloscilloscope

Description: This digital oscilloscope takes a MCU and FPGA as the core. We made emphases on the choice of the sampling methods and the implement of equivalent sampling as a result, our design not only has the real-time sampling mode but also can reach the highest equivalent sample rate of 200 MHz using the real-time sample rate of 1 MHz, by way of random equivalent sampling. At the same time, this system has many other functions, such as 2 mV small-signal measuring, storage and re-display of waveform, measuring frequency, selective trigger edge, output of the correction signal and so on.-This digital oscilloscope takes a MCU and FPGA as the core. We made emphases on the choice of the sampling methods and the implement of equivalent sampling as a result, our design not only has the real-time sampling mode but also can reach the highest equivalent sample rate of 200 MHz using the real-time sample rate of 1 MHz, by way of random equivalent sampling. At the same time, this system has many other functions, such as 2 mV small-signal measuring, storage and re-display of waveform, measuring frequency, selective trigger edge, output of the correction signal and so on.
Platform: | Size: 2180096 | Author: 荣超群 | Hits:

[VHDL-FPGA-Verilog] ADC0809

Description: VHDL写的ADC0809的控制转换程序，很容易就看懂的，结构明晰，还有示波器输出模式。-ADC0809 write VHDL control the conversion process, it is easy to understand, and the structure of clarity, as well as the output mode oscilloscope.
Platform: | Size: 1024 | Author: 袁野 | Hits:

[Other] jj

Description: 本题设计一个数字存储示波器，以Xilinx公司20万门FPGA芯片为核心，辅以必要的外围电路（包括信号调理、采样保持、内部触发、A/D转换、D/A转换和I/O模块），利用VHDL语言编程，实现了任意波形的单次触发、连续触发和存储回放功能，并按要求进行了垂直灵敏度和扫描速度的挡位设置。信号采集时，将外部输入信号经信号调理模块调节到A/D电路输入范围，经A/D转换后送入FPGA内部的双口RAM进行高速缓存，并将结果通过D/A转换送给通用示波器进行显示，完成了对中、低频信号的实时采样和高频信号的等效采样和数据存储回放。经测试，系统整体指标良好，垂直灵敏度和扫描速度等各项指标均达到设计要求。-The problem to design a digital storage oscilloscope, to Xilinx, 200,000 FPGA chip as the core, supplemented by the necessary peripherals (including signal conditioning, sample and hold, internal trigger, A/D converter, D/A conversion and I/O modules) the use of VHDL language programming, arbitrary waveform one-shot, continuous playback is triggered, and storage, in accordance with the requirements of the vertical sensitivity and sweep speed of the gear set. Signal acquisition, it will be the external input signal conditioning by the signal conditioning modules to the A/D circuit input range, after A/D converted into the FPGA s internal dual-port RAM for high-speed cache, and the results through the D/A converter to give general oscilloscope shows completed, the low-frequency signals in real-time sampling and high-frequency signals equivalent sampling and data storage playback. Been tested, the system as a whole indices are good, the vertical sensitivity and scan speed indicators meet
Platform: | Size: 546816 | Author: 黄奇家 | Hits:

[VHDL-FPGA-Verilog] Digital_oscilloscope_VHDL

Description: 利用VHDL语言编写数字示波器的程序，下载入FPGA中可实现。在Quartus7.1编译环境中已经测试通过。-Digital oscilloscope using VHDL language program, download into the FPGA can be achieved. In Quartus7.1 build environment has been tested.
Platform: | Size: 2180096 | Author: 胡亚东 | Hits:

[VHDL-FPGA-Verilog] Oscilloscope

Description: The design is designed partly in VHDL, partly in schematic drawings and targets a Xilinx Spartan-2E FPGA. However, since the design was tailored specifically for the aforementioned boards it is highly unlikely that it can be ported to other hardware. The circuits were designed on a Windows XP using the Xilinx WebPack 6.2 tool. The transfer of the design to the FPGA was carried out either with the Xilinx Impact tool through a parallel JTAG cable or with the Digilent Export utility through a USB JTAG cable.
Platform: | Size: 1854464 | Author: sami | Hits:

[VHDL-FPGA-Verilog] A_digital_WaveformGenerator_and_Oscilloscope_based

Description: 一种基于BASYS开发板(Xilinx Spartan-3E FPGA)的波形发生器和示波器的设计，可以产生多种可调波形，并实时显示在电脑显示器或者投影仪上。波形发生器采用基于ROM的数字控制振荡器（NCO）实现，示波器采用VGA接口实时显示。-A kind of digital WaveGenerator and Oscilloscope based on tne BASYS experiment board which has a Xilinx Spartan-3E FPGA on it.This design can make adjustable sine,triangle and rectangle waveform.It also can show the waveform real time on a computer dispaly or a projecting apparatus via a VGA cable.The emphases of this project is to realize real-time VGA interface in a FPGA.
Platform: | Size: 3417088 | Author: 张文 | Hits:

[VHDL-FPGA-Verilog] digital-storage-oscilloscope

Description: 本题设计一个数字存储示波器，以Xilinx公司20万门FPGA芯片为核心，辅以必要的外围电路（包括信号调理、采样保持、内部触发、A/D转换、D/A转换和I/O模块），利用VHDL语言编程，实现了任意波形-The problem to design a digital storage oscilloscope, to Xilinx, Inc. 200,000 FPGA chip as the core, supplemented by the necessary peripherals (including signal conditioning, sample and hold, the internal trigger, A/D converter, D/A conversion and I/O modules) using VHDL language programming, the arbitrary waveform
Platform: | Size: 14336 | Author: Jasen | Hits:

[VHDL-FPGA-Verilog] equivalent_sample----vhdl

Description: 基于FPGA的数字示波器的整体设计与实现的各种方案，采用等精读测频率，数据的采集等多项技术的分析-FPGA-based digital oscilloscope of the overall design and implementation of various programs, such as intensive use of the frequency measurement, data collection and many other technical analysis
Platform: | Size: 2452480 | Author: 杨前 | Hits:

[VHDL-FPGA-Verilog] sbq

Description: 基于fpga和传统示波器工作方式的vhdl程序，通过ad0809采样信号（可兼容tlc5510）再经由8位da转换输出，同时输出外触发锯齿波，建议使用感性小的示波器探头，否则锯齿波低频时会出现失真-Fpga-based and traditional ways of working oscilloscope vhdl procedures, through ad0809 sampling signal (compatible tlc5510) and then through eight da conversion output, while the output sawtooth external trigger is recommended to use a small emotional oscilloscope probe, otherwise there will be low-frequency sawtooth distortion
Platform: | Size: 6238208 | Author: 朱志超 | Hits:

[Software Engineering] zxb

Description: 利用VHDL语言编程产生正弦信号，熟悉介绍了LPM_ROM与FPGA硬件资源的使用方法，包括仿真和资源利用情况了解，包括SignalTap II测试、FPGA中ROM的在系统数据读写测试和利用示波器测试。完成了配置器件的编程。-Using VHDL language programming sinusoidal signal, using the method described LPM_ROM familiar with FPGA hardware resources, including simulation and understanding of resource utilization, including SignalTap II test, FPGA in ROM read and write data in the system testing and testing with an oscilloscope. Complete programmatic configuration of the device.
Platform: | Size: 321536 | Author: 李小花 | Hits:

[VHDL-FPGA-Verilog] sin_rising_judge

Description: 这是用vhdl编写的正弦波触发程序，用单片机和fpga做示波器时，可以参考一下这个触发程序。-It is written by vhdl sine trigger when MCU and fpga do oscilloscope, you can refer to the trigger.
Platform: | Size: 1024 | Author: 殷超 | Hits:

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