Title:
A_digital_WaveformGenerator_and_Oscilloscope_based
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Description: A kind of digital WaveGenerator and Oscilloscope based on tne BASYS experiment board which has a Xilinx Spartan-3E FPGA on it.This design can make adjustable sine,triangle and rectangle waveform.It also can show the waveform real time on a computer dispaly or a projecting apparatus via a VGA cable.The emphases of this project is to realize real-time VGA interface in a FPGA.
File list (Check if you may need any files):
基于BASYS开发板的波形发生器和示波器设计\20101109_基于BASYS开发板的信号发生器和示波器设计.pdf
.......................................\Oscilloscope\.lso
.......................................\............\DDS.sym
.......................................\............\DDS.vhd
.......................................\............\DDS_summary.html
.......................................\............\DDS_vhdl.prj
.......................................\............\display.cmd_log
.......................................\............\display.jhd
.......................................\............\display.pdf
.......................................\............\display.sch
.......................................\............\display.schbak
.......................................\............\display.schcmd
.......................................\............\display.schlog
.......................................\............\display.sym
.......................................\............\display.vhf
.......................................\............\divide_frequency.sym
.......................................\............\divide_frequency.vhd
.......................................\............\divide_frequency_vhdl.prj
.......................................\............\HVCNT.vhd
.......................................\............\IMG2coe8\IMG2coe8.m
.......................................\............\........\logo.coe
.......................................\............\........\logo.jpg
.......................................\............\IMG2coe8.m
.......................................\............\ipcore_dir\blk_mem_gen_ds512.pdf
.......................................\............\..........\Dual_RAM_512x8.asy
.......................................\............\..........\Dual_RAM_512x8.gise
.......................................\............\..........\Dual_RAM_512x8.ise
.......................................\............\..........\Dual_RAM_512x8.ncf
.......................................\............\..........\Dual_RAM_512x8.ngc
.......................................\............\..........\Dual_RAM_512x8.sym
.......................................\............\..........\Dual_RAM_512x8.v
.......................................\............\..........\Dual_RAM_512x8.veo
.......................................\............\..........\Dual_RAM_512x8.vhd
.......................................\............\..........\Dual_RAM_512x8.vho
.......................................\............\..........\Dual_RAM_512x8.xco
.......................................\............\..........\Dual_RAM_512x8.xise
.......................................\............\..........\Dual_RAM_512x8_flist.txt
.......................................\............\..........\...............xdb\tmp\ise\version
.......................................\............\..........\..................\...\...\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject
.......................................\............\..........\..................\...\...\............\..................\.........\HDProject_StrTbl
.......................................\............\..........\..................\...\...\............\..................\__stored_object_table__
.......................................\............\..........\..................\...\...\............\PnAutoRun\Scripts\RunOnce_tcl
.......................................\............\..........\..................\...\...\............\.........\.......\RunOnce_tcl_StrTbl
.......................................\............\..........\..................\...\...\............\.rojectNavigator\dpm_project_main\dpm_project_main
.......................................\............\..........\..................\...\...\............\................\................\dpm_project_main_StrTbl
.......................................\............\..........\..................\...\...\..REGISTRY__\Autonym\regkeys
.......................................\............\..........\..................\...\...\.......
