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Description: This document contains a specification for a new low pin count bus interface, dubbed LPC, that will be added to
future Intel chip-sets. The target audience for this document are system and component designers.
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Size: 934677 |
Author: 李俊 |
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Description: lpc源代码verilog实现的。操作low pin count设备
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Size: 1604 |
Author: 毛军捷 |
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Description: This document contains a specification for a new low pin count bus interface, dubbed LPC, that will be added to
future Intel chip-sets. The target audience for this document are system and component designers.
Platform: |
Size: 934912 |
Author: 李俊 |
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Description: lpc源代码verilog实现的。操作low pin count设备-LPC realize the Verilog source code. Operation of low pin count devices
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Size: 1024 |
Author: 毛军捷 |
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Description: The FM24C256/C256L/C256LZ devices are 256 Kbits CMOS
nonvolatile electrically erasable memory. These devices offer the
designer different low voltage and low power options. They
conform to all requirements in the Extended IIC 2-wire protocol.
Furthermore, they are designed to minimize device pin count and
simplify PC board layout requirements.
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Size: 3072 |
Author: 王进 |
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Description: LPC总线从设备的verilog设计,包含状态机和中断功能。-verilog code for LPC device
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Size: 5120 |
Author: 饶进平 |
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Description: Wishbone to LPC (Low-Pin Count) Bridge, includes master and slave modules. Supports 8-bit I/O Read and Write cycles, 8-bit Memory Read/Write cycles, DMA cycles, and up to 32-bit Firmware memory read/write cycles. Serial IRQ support is also provided.
None of this has been tested (yet) with a third-party LPC Peripheral or Host.
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Size: 410624 |
Author: Arun |
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Description: AX88772A/AX88172A Low-pin-count
USB 2.0 to 10/100M Fast Ethernet Controller-The AX88772A/AX88172A Low-pin-count USB 2.0 to 10/100M Fast Ethernet controller is a high performance and highly integrated
ASIC which enables low cost, small form factor, and simple plug-and-play Fast Ethernet network connection capability for desktops,
notebook PC’s, Ultra-Mobile PC’s, docking stations, game consoles, digital-home appliances, and any embedded system using a
standard USB port.
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Size: 508928 |
Author: yiming |
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Description: Low Pin Count Interface Specification, Revision 1.1 (LPC)
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Size: 380928 |
Author: 张恒 |
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Description: INTEL LOW PIN COUNT IS A NEW BUS IN INTEL BUS
Platform: |
Size: 380928 |
Author: ll |
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Description: GM5621作为显示器的超级微处理器，本资料详细介绍了内存划分和功能描述。让初学者很快找到切入点-Genesis GM5621 and GM5626 are all-in-one dual input LCD monitor controllers supporting
resolutions up to SXGA/WXGA, available in a very low pin count package.
Platform: |
Size: 100352 |
Author: 张铭 |
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Description: SST’s 25 series Serial Flash family features a four-wire,
SPI-compatible interface that allows for a low pin-count
package which occupies less board space and ultimately
lowers total system costs. The SST25VF016B devices are
enhanced with improved operating frequency and even
lower power consumption than the original SST25VFxxxA
devices. SST25VF016B SPI serial flash memories are
manufactured with SST’s proprietary, high-performance
CMOS SuperFlash technology. The split-gate cell design
and thick-oxide tunneling injector attain better reliability and
manufacturability compared with alternate approaches
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Size: 5120 |
Author: ldc |
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Description: adge可以作为Flash编程器，用于NEC 全 Flash MCU 系列： 78K0S (8位低引脚数MCU), 78K0 (8位MCU), 78K0R (16位MCU), 和V850 (32位MCU)。但需要专用的软件，对于每个系列的专用软件均可以从NEC Electronics 网站上下载。-adge can serve as a Flash programmer for NEC All Flash MCU Series: 78K0S (8-bit low pin-count MCU), 78K0 (8 位 MCU), 78K0R (16 位 MCU), and V850 (32 位 MCU). But requires special software, special software for each series are available from the NEC Electronics web site.
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Size: 121856 |
Author: 闫刚 |
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Description: SMII接口的mac控制器，通过测试。使用verilog语言！-The Serial Media Independent Interface, SMMI, is a low pin count version of the MII normally used between ethernet MAC and PHY.
The Serial Media Independent Interface (SMII) is designed to satisfy the following requirements:
Convey complete MII information between a 10/100 PHY and MAC with two pins per port
allow multi port MAC/PHY communications with one system clock
Operate in both half and full duplex
per packet switching between 10 Mbit and 100 Mbit data rates
allow direct MAC to MAC communication
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Size: 1035264 |
Author: weixin |
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Description: This document contains a specification for a new low pin count bus interface, called LPC. The
target audiences for this document are system and component designers.
Platform: |
Size: 24576 |
Author: sungd |
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Description: STM32f407是一种基于Cortex-M4的用于高端控制领域的单片机，功能强大！-The ARM Cortex-M4F processor is the latest generation of ARM processors for embedded
systems. It was developed to provide a low-cost platform that meets the needs of MCU
implementation, with a reduced pin count and low-power consumption, while delivering
outstanding computational performance and an advanced response to interrupts.
Platform: |
Size: 1113088 |
Author: 钟鹏 |
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Description: LPC标准 V1.1.PDF
Low Pin Count V1.1.PDF-Low Pin Count V1.1.PDF
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Size: 380928 |
Author: 吴俊泉 |
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Description: for ITE IT87xx Environment Control - Low Pin Count Input Output.
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Size: 5120 |
Author: saoseve |
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Description: This shows how to read the A2D converter and display the
* High order parts on the 4 bit LED display.
* The pot on the Low Pin Count Demo board varies the voltage
* coming in on in A0.
*
* The A2D is referenced to the same Vdd as the device, which
* is nominally is 5V. The A2D returns the ratio of the voltage
* on Pin RA0 to 5V. The A2D has a resolution of 10 bits, with 1023
* representing 5V and 0 representing 0V.- This shows how to read the A2D converter and display the
* High order parts on the 4 bit LED display.
* The pot on the Low Pin Count Demo board varies the voltage
* coming in on in A0.
*
* The A2D is referenced to the same Vdd as the device, which
* is nominally is 5V. The A2D returns the ratio of the voltage
* on Pin RA0 to 5V. The A2D has a resolution of 10 bits, with 1023
* representing 5V and 0 representing 0V.
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Size: 17408 |
Author: SPF |
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Description: Watchdog Timer Driver for ITE IT87xx Environment Control - Low Pin Count Input Output.
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Size: 6144 |
Author: xiezlnm |
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