Welcome![Sign In][Sign Up]
Location:
Search - ldpc and verilog

Search list

[Booksldpc

Description: 详细介绍LDPC算法的内容及其概要的电子书籍-LDPC algorithm details and a summary of the contents of the e-books
Platform: | Size: 421888 | Author: ken | Hits:

[CommunicationLDPC

Description: ldpc码原理与应用 文红 电子科技大 电子版 全文 与大家共享-Principle and Practical LDPC Code Red Electronics Science and Technology The full text of the electronic version to share with everyone
Platform: | Size: 12621824 | Author: | Hits:

[VHDL-FPGA-VerilogLDPC_Encoder_Verilog

Description: Verilog语言编写的LDPC编码程序-Verilog languages LDPC coding procedures
Platform: | Size: 9216 | Author: 陈楚龙 | Hits:

[Communication-MobileStanford_ldpca_demo_software

Description: stanford开发的LDPCA(LDPC码的改进)的编码器和解码器,以及几个码字。-stanford development LDPCA (LDPC codes to improve) the encoder and decoder, as well as several code words.
Platform: | Size: 6643712 | Author: algernon | Hits:

[Streaming Mpeg4ldpc_encoder_802_3an.v

Description: LDPC 编码的Verilog源代码,我没有验证,不知道效果如何,与大家分享,供大家参考。-LDPC-coded Verilog source code, I did not verify, I do not know how to share with you, for your reference.
Platform: | Size: 622592 | Author: peter | Hits:

[VHDL-FPGA-VerilogLDPC_Behavioral_VHDL

Description: 用VHDL语言编写的LDPC码硬件实现语言,相对于verilog的,比较简单-Using VHDL language LDPC code hardware implementation language, compared to Verilog, and relatively simple
Platform: | Size: 2048 | Author: 王明 | Hits:

[Otherldpc_decoder_802_3an.tar

Description: 802.3an Ethernet 以太网络 LDPC Verilog 网表实现-802.3an Ethernet Ethernet LDPC Verilog netlist to achieve
Platform: | Size: 914432 | Author: | Hits:

[ELanguageldcp_verilog

Description: ldpc verilog 程序 做ldpc硬件实现的可以-ldpc verilog procedures do LDPC hardware implementation can
Platform: | Size: 9216 | Author: nzh | Hits:

[Industry researchVLSI_Architectures_for_ECC

Description: This thesis devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.-This thesis is devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.
Platform: | Size: 1072128 | Author: MicroSam | Hits:

[Other61EDA_B79

Description: 书名:LDPC原理与应用。是国内第一本介绍用LDPC编、译码基本原理及应用技术的一本书。对用 vhdl 或verilog实现硬件编程LDPC的人开发无线通信是很好的资料-Title: LDPC Principles and Applications. Is the first book describes using LDPC Encoding and Decoding the basic principles and application of technology, a book. Right to use vhdl or verilog hardware programming LDPC people to achieve development of wireless communications is a very good information
Platform: | Size: 8414208 | Author: 邓军 | Hits:

[VHDL-FPGA-VerilogRealization_of_FPGA_for_LDPC_encoding

Description: 低密度奇偶校验码(简称LDPC码)是目前距离香农限最近的一种线性纠错码,它的直接编码运算量较大,通常具有码长的二次方复杂度.为此,利用有效的校验矩阵,来降低编码的复杂度,同时研究利用大规模集成电路实现LDPC码的编码.在ISE 8.2软件平台上采用基于FPGA的Verilog HDL语言实现了有效的编码过程,为LDPC码的硬件实现和实际应用提供了依据-Abstract:Low.density parity·check code(LDPC code)is a kind of linear eror·correcting code nearest to Shannon Limit.For LDPC cod e,the computational overhead for direct encoding operations is large,as the complexity of encod ing is the square of the length of codeword.Hence,this paper reduces the complexity of coding by using effective parity—check matrix,and realizes the encoding device for LDPC code by use of large·scale integrated circuits.The effective encoding process based on FPGA with Verilog HDL language is implemented on ISE 8.2 software platform ,providing a feasible basis for hardware implementation an d practical application of LDPC code.
Platform: | Size: 165888 | Author: 秦小星 | Hits:

[VHDL-FPGA-Verilogthe-decoding-algorithm-of-ldpc

Description: ldpc译码算法介绍及fpga verilog系统方案设计,包括log_bp算法、min_sum算法、scaling_min_sum算法等-introducing the ldpc code decoding algorithm and the related system design,including the log_bp,the min_sum and the scaling_min_sum
Platform: | Size: 81920 | Author: 类春阳 | Hits:

[VHDL-FPGA-Verilogldpc-encode

Description: 深空通信中AR4JA码编码的研究与实现,AR4JA码是LDPC码的一种,文件中是Verilog语言的硬件实现。-Research and Implementation of the Deep Space Communications AR4JA coding, AR4JA code LDPC codes a hardware implementation of the Verilog language file.
Platform: | Size: 3565568 | Author: liangliang | Hits:

[Program docQC-LDPC-decoder-FPGA

Description:  文章提出了一种可以兼容不同码率规则和非规则准循环低密度校验码(LDPC)的部分并行译码结构, 用Verilog语言开发,基于该部分并行结构在Altera公司的StratixII-EP2S90器件上验-This paper presents a part of different bit rates can be compatible with the rules and irregular quasi-cyclic low density parity check code (LDPC) decoding parallel structure, parallel structure based on experience in the section on Altera s devices StratixII-EP2S90
Platform: | Size: 420864 | Author: 我问问 | Hits:

[Otherverilog_rtl

Description: 关于LDPC解码的verilog程序,包含设计代码和验证环境-LDPC decoding on verilog procedures, including the design code and verification environment
Platform: | Size: 64512 | Author: chenxiaolei | Hits:

[matlabe60a9bd4-ef5c-4c89-bfb3-9da40d5e4aba

Description: 低密度校验码 ,很好用的代码,功能已经实现编码和译码(Low density parity check code, very good code, the function has been achieved encoding and decoding)
Platform: | Size: 8192 | Author: RubenJH | Hits:

CodeBus www.codebus.net