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Description: The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources. -The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plugplay method is used to configure and connect the IP cores without the need to modify any global resources.
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Size: 6010300 |
Author: 笑雨 |
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Description: free hardware ip core about sparcv8,a soc cpu in vhdl-free hardware ip core about sparcv8. a soc cpu in vhdl
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Size: 10994489 |
Author: 样河 |
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Description: The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip
(SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent
method for simulation and synthesis. The library is vendor independent, with support for different
CAD tools and target technologies. A unique plug&play method is used to configure and connect
the IP cores without the need to modify any global resources.-The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) developmen t. The IP cores are centered around a common on-c hip bus, and use a coherent method for simulation and syn thesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug
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Size: 103163 |
Author: 岳昆 |
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Description: The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug&play method is used to configure and connect the IP cores without the need to modify any global resources. -The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) development. The IP cores are centered around the common on-chip bus, and use a coherent method for simulation and synthesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plugplay method is used to configure and connect the IP cores without the need to modify any global resources.
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Size: 6009856 |
Author: 笑雨 |
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Description: free hardware ip core about sparcv8,a soc cpu in vhdl-free hardware ip core about sparcv8. a soc cpu in vhdl
Platform: |
Size: 10994688 |
Author: 样河 |
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Description: The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip
(SOC) development. The IP cores are centered around a common on-chip bus, and use a coherent
method for simulation and synthesis. The library is vendor independent, with support for different
CAD tools and target technologies. A unique plug&play method is used to configure and connect
the IP cores without the need to modify any global resources.-The GRLIB IP Library is an integrated set of reusable IP cores, designed for system-on-chip (SOC) developmen t. The IP cores are centered around a common on-c hip bus, and use a coherent method for simulation and syn thesis. The library is vendor independent, with support for different CAD tools and target technologies. A unique plug
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Size: 103424 |
Author: 岳昆 |
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Description: Leon3 & GPLIB libraries for CYGWIN/UNIX
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Size: 139264 |
Author: Dan |
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Description: Luminary Grlib PC emulator with FreeRTOS:
Contains PC simulator of the FreeRTOS and Luminary Micro Grlib graphical library emulator
Unzip, goto directory, double click WIN32.sln, F7, Ctrl+F5 and you should see 2 windows, first is console, second emulator with a slider. Try to slide...
Using Visual Studio 2008 Express Edition
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Size: 1427456 |
Author: YouYou |
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Description: GRLIB Open IP Library User Manual
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Size: 626688 |
Author: Amir |
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Description:
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Size: 17900544 |
Author: Gopi |
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Description: Luminary library for Graphics -Luminary library for GraphicsLuminary library for Graphics
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Size: 3333120 |
Author: Concerto |
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Description: TI Stellaris系列（原Luminary）的图形库，可以用来做很炫的图形界面-TI Stellaris family (formerly Luminary) The graphics library can be used to make flashy graphical interface
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Size: 2334720 |
Author: ygchaoren |
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Description: gaisler lib. Format .vhd
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Size: 150528 |
Author: Vovka |
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Description: Zipped LEON3 processor VHDL core.
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Size: 1452032 |
Author: AcousticMan |
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Description: Leon3 source code package
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Size: 23737344 |
Author: chang-chih |
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Description: linux系统上，GRLIB GRUSBHC UHCI主机控制器驱动程序（HCD）,the linux system GRLIB GRUSBHC UHCI host controller driver (HCD)
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Size: 2048 |
Author: xingkong38 |
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Description: linux系统上，Aeroflex Gaisler GRLIB GRUSBHC EHCI主控制器USB的驱动程序。-of Aeroflex Gaisler GRLIB GRUSBHC EHCI main controller USB driver on linux system.
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Size: 2048 |
Author: flameray |
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Description: grlib soc development. Using grlib a
SOC can be created in a matter of hours.
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Size: 18263040 |
Author: eiselekd |
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Description: UHCI HCD (Host Controller Driver) for GRLIB GRUSBHC.
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Size: 2048 |
Author: lengdangwi |
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Description: 嵌入式开发。TI stellaries的图形库使用指南-TI stellaries grlib
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Size: 1163264 |
Author: zhangyuxiao |
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