Search - generator

[Mathimatics-Numerical algorithms] tre

Description: 实现正态分布的伪随机数发生器-To achieve normal distribution of the pseudo-random number generator
Platform: | Size: 2048 | Author: 在一 | Hits:

[Embeded-SCM Develop] MAX038

Description: 函数发生器集成芯片max038资料，该芯片可以产生方波，三角波，正弦波等多种波形-Function Generator max038 chip data, the chip can produce square wave, triangle wave, sinusoidal waveform, etc.
Platform: | Size: 187392 | Author: zrj | Hits:

[Other] pulse

Description: 脉冲发生器，可实现脉宽和幅度的任意调节。相信对大家有用。-Pulse generator, pulse width and amplitude can realize arbitrary regulation. I believe it useful to everyone.
Platform: | Size: 514048 | Author: sdcsadf | Hits:

[VHDL-FPGA-Verilog] multi-wave-creator

Description: 基于FPGA的多波形发生器（编程环境QuartusII6.0）-FPGA-based Multi-Waveform Generator (programming environment QuartusII6.0)
Platform: | Size: 1053696 | Author: 朱旋风 | Hits:

[VHDL-FPGA-Verilog] sin_generator

Description: 在quartus 11 5.1 里用VHDL编写的正弦波发生器，经过仿真通过-Quartus 11 5.1 years in VHDL prepared using sine wave generator, through simulation through
Platform: | Size: 245760 | Author: 郭翠双 | Hits:

[Other] DDSxinhaofashengqi

Description: 介绍了如何采用DDS原理进行信号发生器的设计，又需要的下-Introduced the principle of how to use DDS signal generator is designed and the needs of the next
Platform: | Size: 541696 | Author: 郑智文 | Hits:

[VHDL-FPGA-Verilog] 61EDA_D159

Description: 正弦波发生器,VHDL的应用和处理,可以产生任意波形-Sine wave generator, VHDL applications and processing, can generate arbitrary waveform
Platform: | Size: 1731584 | Author: WBT | Hits:

[SCM] wave-generator

Description: 产生方波，三角波，正弦波，余弦波等波形，并且可以自由选择和切换，最后可以用于波形输出-Have a square wave, triangle wave, sine wave, cosine wave, such as waveform, and can freely choose and switch, and finally can be used for waveform output
Platform: | Size: 6144 | Author: 周易 | Hits:

[Graph Recognize] Generator

Description: 条形码生成器源程序：生成一维条形码，直接运行程序即可，条形码识别，直接运行程序即可-Bar code generator source: generate one-dimensional bar code, you can directly run the program, bar code identification, you can run programs directly
Platform: | Size: 58368 | Author: wjw | Hits:

[VHDL-FPGA-Verilog] simulink-03-31

Description: 基于MATLAB/DSP Ｂuild可控信号发生器，由Ｍatlab建模综合，并生成ＶＨＤＬ代码，由Ｑuartus编译通过．-Based on MATLAB/DSP Build controllable signal generator, by the Matlab modeling synthesis, and generates VHDL code, adopted by the Quartus compiler.
Platform: | Size: 297984 | Author: ltianyang | Hits:

[Documents] 11

Description: 本论文是基于FPGA的多功能信号发生器，其中包括了整个设计流程-This paper is based on the multi-function signal generator of the FPGA, including the entire design flow
Platform: | Size: 78848 | Author: 王晨磊 | Hits:

[Documents] clk

Description: 时钟发生器 clkgen 利用外来时钟信号clk 来生成一系列时钟信号clk1、fetch、alu_clk 送往CPU的其他部件-Clock Generator clkgen use of external clock signal clk to generate a series of clock signal clk1, fetch, alu_clk sent to other parts of the CPU
Platform: | Size: 1024 | Author: 王晨磊 | Hits:

[Software Engineering] zhuangzice

Description: 双馈风力发电机转子侧励磁控制器的软件设计-Doubly-fed wind generator rotor side excitation controller software design
Platform: | Size: 4944896 | Author: wangmeng | Hits:

[VHDL-FPGA-Verilog] vga_gen_46

Description: Verilog Vga Generator -Verilog Vga Generator
Platform: | Size: 1024 | Author: Fermat | Hits:

[Other Riddle games] Maze200606

Description: 用Delphi开发的一个迷宫生成器，可以通过参数的调整生成风格迥异的迷宫。可以输出为文本文档。-Using Delphi to develop a maze generator can adjust the parameters to generate different styles of the maze. Can be output as a text document.
Platform: | Size: 22528 | Author: 无尽愿 | Hits:

[SCM] DAC0832

Description: 信号发生器，，可以产生三角波，方波，锯齿波，用５１单片机来控制实现-Signal generator, can generate the triangular wave, square wave, sawtooth wave, with 51 single-chip microcomputer to control the realization of
Platform: | Size: 277504 | Author: 葛永强 | Hits:

[VHDL-FPGA-Verilog] signal-generator

Description: FPGA 信号发生器的程序，在实验板上调试成功-FPGA signal generator procedures, the success of the experiment on-board debugging
Platform: | Size: 1024 | Author: 石头 | Hits:

[matlab] Application_in_FPGA_design_of_Matlab_simulink

Description: 分析了MATLAB/Simulink 中DSP Builder 模块库在FPGA 设计中优点，然后结合FSK 信号的产生原理，给出了如何利用DSP Builder 模块库建立FSK 信号发生器模型，以及对FSK 信号发生器模型进行算法级仿真和生成VHDL 语言的方法，并在modelsim 中对FSK 信号发生器进行RTL 级仿真，最后介绍了在FPGA 芯片中实现FSK 信号发生器的设计方法。-Analysis of the MATLAB/Simulink in DSP Builder Blockset in the FPGA design advantages, and then combined with the emergence of the principle of FSK signal is given how to use DSP Builder Blockset establish FSK signal generator model, as well as the FSK signal generator model algorithm class VHDL simulation and generation language approach, and in ModelSim for FSK signal generator for RTL-level simulation, and finally introduce the FPGA chip realize FSK signal generator design method.
Platform: | Size: 275456 | Author: 普林斯 | Hits:

[matlab] Gold_sequence_generator

Description: Gold sequence generator
Platform: | Size: 4096 | Author: 孔政敏 | Hits:

[matlab] dfig

Description: 基于DQ轴同步旋转坐标轴系数学模型下的双馈发电机simulink模型。-Based on the DQ-axis synchronous rotating frame mathematical model of the shaft under the simulink model of doubly-fed generator.
Platform: | Size: 7168 | Author: cc | Hits:

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