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Description: 无刷双馈电机建模仿真的matlab、simulink代码。控制绕组的频率一定时，而发电机的转速在风速下的变化过程。
-BDFM Modeling and Simulation of matlab, simulink code. Control winding frequency of a certain time, while the generator speed in the wind under the process of change.
Platform: |
Size: 5120 |
Author: evan |
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Description: Multicast Packet Generator 多播包生成器-Multicast Packet Generator multicast packet generator
Platform: |
Size: 14336 |
Author: 成若 |
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Description: 基于FPGA的多波形发生器
基于FPGA的多波形发生器-FPGA-based multi-waveform generator based on multi-FPGA Waveform Generator
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Size: 1073152 |
Author: 刘明吉 |
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Description: 正弦信号发生器（可扫频）通过验证
正弦信号发生器-Sinusoidal signal generator (which can be swept) through the validation of sinusoidal signal generator
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Size: 59392 |
Author: 刘明吉 |
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Description: verilog编写随机数产生源程序，在硬件电路设计中应用广泛。本程序是在LFSR and a CASR 基础上实现的-random number generator to prepare Verilog source code, in the hardware circuit design applications. This procedure is in the LFSR and a CASR based on the
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Size: 94208 |
Author: Alex |
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Description: CRC码产生器与校验器程序
Features ：
Executes in one clock cycle per data word
Any polynomial from 4 to 32 bits
Any data width from 1 to 256 bits
Any initialization value
Synchronous or asynchronous reset-CRC code generator and calibration program Features: Executes in one clock cycle per data word Any polynomial from 4 to 32 bits Any data width from 1 to 256 bits Any initialization value Synchronous or asynchronous reset
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Size: 5120 |
Author: Alex |
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Description: 用8051控制DDS信号发生器，产生1HZ-10MHz的正弦波/三角波/方波-DDS with 8051 control signal generator, producing the 1HZ-10MHz sine/triangle/square wave
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Size: 43008 |
Author: 徐小平 |
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Description: 一种多制式电视信号发生器，包含多种格式，可产生PAL、NTSC、SECAM下的各种信号-A multi-system television signal generator, including a variety of formats, can produce PAL, NTSC, SECAM, under a variety of signal
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Size: 2048 |
Author: 镜子 |
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Description: 基于SIMULINK同步发电机机端短路的仿真资料。-SIMULINK based on the synchronous generator terminal short-circuit simulation data.
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Size: 447488 |
Author: tinyli |
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Description: simulating a convolutional encoder
allows the user to input a source code to be encoded and also input the values of the generator polynomials. It outputs the encoded data bits, where 1/n is the code rate
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Size: 1024 |
Author: 郑中 |
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Description: Rayleigh Fading Channel Signal Generator
Platform: |
Size: 2048 |
Author: andy |
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Description: 简易信号发生器，可产生正弦波、方波、三角波，幅度、频率都可调节。-Simple signal generator can produce sine, square, triangle wave, amplitude, frequency adjustment can be.
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Size: 242688 |
Author: 苏维 |
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Description: JAD生成器.rar （可以自由为jar配置jad文件，进行java安装）-JAD generator. Rar (free jad to jar configuration file for java installation)
Platform: |
Size: 342016 |
Author: bin |
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Description: 基于DDS原理的正弦信号发生器。用VERILOG语言实现，功能强大。-DDS based on the principle of sinusoidal signal generator. Using Verilog language and powerful.
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Size: 558080 |
Author: 毛华站 |
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Description: opencore, random number generator, verilog
Platform: |
Size: 3072 |
Author: jason |
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Description: 一个PN序列发生器，大M序列，供参考学习，-A PN sequence generator, the M series, for reference study,
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Size: 1024 |
Author: yiyi |
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Description: 自己编的VGA彩条信号发生器verilog ise环境-Own the VGA color signal generator verilog ise Environment
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Size: 416768 |
Author: mcuxxq |
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Description: 伪随机序列产生器,线性反馈移位寄存器，原代码。-Pseudo-random sequence generator, linear feedback shift register, the original code.
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Size: 162816 |
Author: 李辛 |
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Description: 伪随机序列产生器－线性反馈移位寄存器，Verilog HDL 原代码。-Pseudo-random sequence generator- linear feedback shift register, Verilog HDL source code.
Platform: |
Size: 1024 |
Author: 李辛 |
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Description: 伪随机序列产生器－代进位反馈移位寄存器，verilog hdl 原代码。-Pseudo-random sequence generator- on behalf of binary feedback shift register, verilog hdl original code.
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Size: 1024 |
Author: 李辛 |
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