Search - fpga u

[USB develop] readwriteudisk

Description: based on lpc2210 and isp1161, usb host, read and write u disk. from zlg-based on lpc2210 and isp1161, USB host, u read and write disk. from zlg
Platform: | Size: 422912 | Author: resun | Hits:

[VHDL-FPGA-Verilog] u-uart

Description: 一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
Platform: | Size: 5120 | Author: 李文文 | Hits:

[Embeded-SCM Develop] EPC2LC20

Description: ALTER的CPLD/FPGA配置芯片的手册，很有用的-ALTER the CPLD/FPGA chip configuration manual, very useful
Platform: | Size: 1639424 | Author: yangyichang | Hits:

[Software Engineering] USB_devide

Description: 利用最新的嵌入式开发工具EDK，在FPGA 中完成对PDIUSBD12 的硬件定制和固件编程，从而在FPGA 中实现U S B 控制器，并最终完成U S B 的枚举过程、驱动程序的开发和简单的应用。-Using the latest embedded development tools, EDK, in the FPGA completes its PDIUSBD12 custom hardware and firmware programming, in order to realize USB controller in the FPGA, and ultimately complete the USB enumeration process of driver development and simple应用.
Platform: | Size: 50176 | Author: pengrong | Hits:

[File Format] 20070409083103343

Description: MP3播放功能之FPGA电路研制,希望对大家用-MP3 playback circuitry of FPGA development, would like to use U.S.
Platform: | Size: 89088 | Author: 丁过州 | Hits:

[Software Engineering] QPSK

Description: 该文介绍了各种信息技术中信息的传输及通信起着支撑作用,而对于信息的传输,数字通信已成为重要手段。该文根据当今现代通信技术的发展,对QPSK信号的调制解调问题进行了分析, 并给出了用美国ELANIX公司的动态系统设计、仿真和分析软件System View 进行系统仿真的具体设置,分析了仿真结果,并提出了用FPGA 技术实现这种系统的详细方法。-This paper introduces a variety of information technology in information transmission and communication plays a supporting role, and for information transmission, digital communication has become an important tool. In this paper, according to today s modern communications technology, for QPSK modulation and demodulation signals are analyzed, and gives the U.S. company s Dynamic Systems Elanix design, simulation and analysis software for System Simulation System View the specific settings, an analysis of simulation results, and made use of FPGA technology to achieve the detailed methodology for such systems.
Platform: | Size: 379904 | Author: 子羽 | Hits:

[VHDL-FPGA-Verilog] ALTERA

Description: altera中文的器件选型手册，大家开发fpga采用altera的器件的话可以-altera Chinese manual device selection, the development of U.S. altera FPGA device used, then can
Platform: | Size: 706560 | Author: zhangxi | Hits:

[VHDL-FPGA-Verilog] scorce

Description: FPGA驱动1602LCD程序，在实验板上实验成功，和大家分享！^_^-FPGA-driven 1602LCD procedures, the success of the experiment on-board experiments, and the U.S. to share! ^ _ ^
Platform: | Size: 2048 | Author: whq | Hits:

[VHDL-FPGA-Verilog] QuartusII_Version_chinese_new

Description: FPGA设计软件的绝佳入门书籍，本人珍藏，全部吐血奉献之2，请大家赶紧下！-FPGA design software, an excellent entry-books, I treasure all the blood sacrifice of 2, please hurry under the U.S.!
Platform: | Size: 844800 | Author: beckham | Hits:

[VHDL-FPGA-Verilog] usb_jtag

Description: FPGA、CPLD芯片的usb数据下载线，下载速度是并口的5位，内有原理图用程序-FPGA, CPLD chip usb data download lines, download speed is the parallel port of the five, with a schematic diagram of procedures in
Platform: | Size: 234496 | Author: 李聚光 | Hits:

[VHDL-FPGA-Verilog] Mars-SP3-U_FPGA_manual

Description: Mars-SP3-U FPGA开发板说明，针对Xilinx的XC3S400，有对原理图的说明和实例操作说明-Mars-SP3-U FPGA development board that Xilinx for the XC3S400, there is schematic diagram of the description and examples of instructions
Platform: | Size: 645120 | Author: iversn | Hits:

[USB develop] USB

Description: USB 设计（包括一个参考设计，和标准U盘）-USB design (including a reference design, and standards for U disk)
Platform: | Size: 546816 | Author: zhangsan | Hits:

[VHDL-FPGA-Verilog] usb_FPGA

Description: 实现USB接口功能的VHDL和verilog完整源代码-Implementation USB interface functions of the VHDL and Verilog source code integrity
Platform: | Size: 260096 | Author: liang | Hits:

[Software Engineering] IGLOO_Icicle_LCPS_SS

Description: Actel 的高速USB接口下载版电路原理图。USB2.0+FPGA。想做个所USB接口通信的可以参考。-Actel IGLOO_Icicle scematics.
Platform: | Size: 47104 | Author: ali | Hits:

[VHDL-FPGA-Verilog] 32_hottest_forum_CPLD-FPGA

Description: 收集了目前关于FPGA设计的论坛，大家如果有什么疑问，可以到这些论坛上求助。-The collection of the current design of the forum on the FPGA, there is little doubt if the U.S. can go to for help on these forums.
Platform: | Size: 13312 | Author: 张芸 | Hits:

[VHDL-FPGA-Verilog] Verilog_UDP

Description: 辛辛苦苦找到的UDP的资料，在verilog中UDP指的是用户定义的原语。比如说大家有时候会见到“primitive...table...endtable...endendprimitive”这样的代码段，在书上只能找到大概的解释。到网上查的话又老是跟TCP/IP的UDP冲突。所以特地搜集到了这个东西，希望能帮助大家解决“用户原语”相关的问题。-UDP hard to find the information in verilog in the UDP refers to the user-defined primitives. For example, we sometimes see the " primitive ... table ... endtable ... endendprimitive" This code segment can only be found in the book about interpretation. The online search, then they are always with the TCP/IP, UDP conflict. So, specifically to collect this stuff, hoping to help people solve the " user of the original language" related issues.
Platform: | Size: 125952 | Author: 龙也 | Hits:

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