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[OS program] 真正32位编译器源代码

Description: 这是一个真正的32位编译器源代码，能直接生成低级机器码和x86 PE可执行文件，能创建GUI或者CUI可执行文件和动态连接库程序，支持byte, word, dword, 单精度浮点数据类型，比较，For, While, Loop 等循环，支持API调用,支持标准常数、自定义数据等，界面漂亮。-This is a real 32-bit compiler source code, junior can directly generate binary and x86 PE executable files, to be able to create GUI or Encoder executable files and dynamic link library that supports byte, word, dword, single precision floating point data types, comparing For, While, Loop and other cycle, support API calls, the standard constant support, custom data, interface beautiful.
Platform: | Size: 496936 | Author: 追风少年 | Hits:

[Other resource] StringFloat

Description: 在VB程序中，完成字符与单精度浮点数的转换，其中StringToDouble为字符串转换为单精度数，FloatToString为单精度数转换为4字节字符串。-in VB program, complete with characters in the single precision floating point conversion, which StringToDouble to string conversion of single-precision the number of single-precision FloatToString conversion of 4-byte string.
Platform: | Size: 1244 | Author: 梁建军 | Hits:

[OS program] 真正32位编译器源代码

Description: 这是一个真正的32位编译器源代码，能直接生成低级机器码和x86 PE可执行文件，能创建GUI或者CUI可执行文件和动态连接库程序，支持byte, word, dword, 单精度浮点数据类型，比较，For, While, Loop 等循环，支持API调用,支持标准常数、自定义数据等，界面漂亮。-This is a real 32-bit compiler source code, junior can directly generate binary and x86 PE executable files, to be able to create GUI or Encoder executable files and dynamic link library that supports byte, word, dword, single precision floating point data types, comparing For, While, Loop and other cycle, support API calls, the standard constant support, custom data, interface beautiful.
Platform: | Size: 496640 | Author: 追风少年 | Hits:

[Algorithm] StringFloat

Description: 在VB程序中，完成字符与单精度浮点数的转换，其中StringToDouble为字符串转换为单精度数，FloatToString为单精度数转换为4字节字符串。-in VB program, complete with characters in the single precision floating point conversion, which StringToDouble to string conversion of single-precision the number of single-precision FloatToString conversion of 4-byte string.
Platform: | Size: 1024 | Author: 梁建军 | Hits:

[VHDL-FPGA-Verilog] vhdldesign

Description: 浮点加法器的VHDL算法设计 浮点加法器的VHDL算法设计-floating point adder VHDL algorithm design of the floating point adder VHDL Design Algorithm
Platform: | Size: 202752 | Author: yan | Hits:

[VHDL-FPGA-Verilog] fpu

Description: 使用VHDL语言描述的单精度浮点处理器。源代码来自国外网站。可实现单精度浮点数的加减乘运算。-Described in VHDL language using single-precision floating-point processor. Web site source code from abroad. Can be achieved single precision floating point addition and subtraction, multiplication.
Platform: | Size: 16384 | Author: WeimuMa | Hits:

[Windows Develop] VFloat_lib_Nov14_2007

Description: 遵循 IEEE 754 标准的浮点运算 库 内含 denorm norm fp_add/sub fp_mult fp_devision 可以快速模拟单双精度浮点运算 导师授权使用 -Follow the IEEE 754 standard floating point library includes denorm norm fp_add/sub fp_mult fp_devision can quickly simulate single-and double-precision floating-point operations instructors are authorized to use
Platform: | Size: 64512 | Author: david | Hits:

[Windows Develop] FixToFloat

Description: 将16位二进制有符号纯小数转换为32位单精度浮点数。实际应用时，最好加tsu、tco约束条件，速度会快些。-There will be 16-bit binary decimal symbol is converted to pure 32-bit single precision floating point. Practical applications, it is best to increase tsu, tco constraints, the speed will be faster.
Platform: | Size: 1024 | Author: li | Hits:

[Linux-Unix] fpadd

Description: 利用verilog hdl编写的浮点加法器运算单元，单精度。-Verilog hdl prepared to use floating-point adder computing unit, single-precision.
Platform: | Size: 12288 | Author: 孟军 | Hits:

[CSharp] 2

Description: 用C#语言把符合IEEE754浮点数储存规范的单精度的浮点数从二进制表示形式转化为十进制表示-C# language to use meet the specifications IEEE754 floating-point single-precision storage of floating-point numbers from binary into a decimal representation that
Platform: | Size: 1024 | Author: 育林居士 | Hits:

[VHDL-FPGA-Verilog] juzhenqufaqi

Description: 基于FPGA单精度浮点除法器的实现，有一些源代码，仅供参考。-FPGA-based single-precision floating-point divider realization, there are some source code, for reference purposes only.
Platform: | Size: 6144 | Author: helinglin | Hits:

[VHDL-FPGA-Verilog] gaojindukuaisuchufa

Description: 高精度的浮点数除法运算，基于浮点运算的FPGA实现，单精度浮点数-High-precision floating-point division operation, the FPGA based on the realization of floating-point operations, single precision floating point
Platform: | Size: 81920 | Author: jiachen | Hits:

[Other] f

Description: This documents describes a free single precision floating point unit. This floating point unit can perform add, subtract, multiply, divide, integer to floating point and floating point to integer conversion.-This documents describes a free single precision floating point unit. This floating point unit can perform add, subtract, multiply, divide, integer to floating point and floating point to integer conversion.
Platform: | Size: 73728 | Author: k | Hits:

[VHDL-FPGA-Verilog] floatAdd_sub16

Description: single precision floating point adderr/sub
Platform: | Size: 235520 | Author: jayanth | Hits:

[Algorithm] SoftFloat-2b

Description: 符合ieee754标准的整数实现浮点算法，包括单精度、双精度、扩展精度（80位以及128位），来自国外。-Integer line ieee754 standard floating-point algorithms, including single-precision, double precision, extended precision (80 and 128), from abroad.
Platform: | Size: 113664 | Author: china | Hits:

[VHDL-FPGA-Verilog] Floating-Point-Adder

Description: 浮点数加法器IP核的vhd设计。浮点数加法运算是运输中使用最高的运算，结合vhdl和EPGA可编程技术，完成具有5线级流水线结构、符合IEEE 754浮点标准、可参数化为单、双精度的浮点数加法器。-Floating point adder design IP core vhd. Floating-point addition operation is used in most transport operations, combined with vhdl and EPGA programmable technology, complete with 5 line-stage pipeline structure to meet IEEE 754 floating point standards, parameters into a single, double precision floating point adder.
Platform: | Size: 154624 | Author: 凌音 | Hits:

[SCM] DSPARMIEEE-754.doc

Description: 将从CAN总线接收到4字节数据转换成单精度浮点数，每个单精度数据占用4个字节 -Received from the CAN bus, 4 bytes of data into a single precision floating point, single precision data each occupy 4 bytes
Platform: | Size: 3072 | Author: 小田 | Hits:

[VHDL-FPGA-Verilog] sqrt_for_single_float_point

Description: 用verilog实现了基于中值定理求解单精度浮点开方的功能，希望对大家学习有所帮助-With verilog implemented based on the mean value theorem to solve single-precision floating point square root function, we want to study and help ... ...
Platform: | Size: 5120 | Author: 楚艳超 | Hits:

[Other] vhdl-ALU-floating-point-single-precision

Description: Arithmetic and logic unit for floating point single precision addition/substruction, multiplication, division and square root.
Platform: | Size: 10240 | Author: RACHIDI | Hits:

[Linux-Unix] single

Description: Software floating-point emulation. Definitions for IEEE Single Precision.
Platform: | Size: 2048 | Author: wfcangsw | Hits:
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