Search - des FPGA

[SourceCode] DES加密算法的软件实现

Description: FPGA/SOPC快速入门教程，对于嵌入式开发者很有帮助
Platform: | Size: 2253 | Author: andrew_wee | Hits:

[Report papers] 基于FPGA的DES加密系统设计与实现.doc

Description: 基于FPGA的DES加密系统设计与实现.doc
Platform: | Size: 1229312 | Author: zhl11b | Hits:

[Documents] 8_iir_filter_design

Description: 8 IIR Filter Design Butterworth Filter Design-eight IIR Filter Design Des Butterworth Filter ign
Platform: | Size: 37888 | Author: 大洋 | Hits:

[Other] EMCRYPTCHIPFORFPGA

Description: 基于FPGA加密芯片设计论文（AES和DES算法）-FPGA-based encryption chip design thesis (AES and DES algorithm)
Platform: | Size: 1068032 | Author: David | Hits:

Description: 密码算法AES,DES,IDEA,MD5等的基本理论和硬件加速方案，对算法进行fpga硬件加速的优点等-Cryptographic algorithm AES, DES, IDEA, MD5, etc. The basic theory and hardware acceleration program, the algorithm of the advantages of FPGA hardware acceleration, etc.
Platform: | Size: 1816576 | Author: 胡昊 | Hits:

[VHDL-FPGA-Verilog] FPGAdesignXilinx

Description: 华为内部资料，关于FPGA设计的详细过程介绍，很不错的。本文档从FPGA器件结构出发以速度路径延时大小和面积资源占用率为主题描述在FPGA设计过程中应当注意的问题和可以采用的设计技巧。-Huawei internal information, with regard to detailed FPGA design process of introduction, it is good. This document from the FPGA device structure in order to speed the path delay and area the size of the theme of the occupancy rate of resource description in the FPGA design process should pay attention to the problems and design techniques can be used.
Platform: | Size: 1705984 | Author: 高超 | Hits:

[Crack Hack] 3DES_FPGA

Description: 介绍了3DES加密算法的原理并详尽描述了该算法的FPGA设计实现。采用了状态机和流水线技术，使得在面积和速度上达到最佳优化；添加了输入和输出接口的设计以增强该算法应用的灵活性。各模块均用硬件描述语言实现，最终下载到FPGA芯片Stratix EP1S25F780C5中。-3DES encryption algorithm, introduced the principle and detailed description of the FPGA algorithm design. Use of state machine and pipelining technology, makes the size and speed to achieve the best optimization added input and output interface design to enhance the flexibility of the application of the algorithm. Each module are used hardware description language to achieve, and ultimately downloaded to the FPGA chip in Stratix EP1S25F780C5.
Platform: | Size: 159744 | Author: 普林斯 | Hits:

[Crack Hack] des3

Description: 3des加密算法实现，经过FPGA验证的！-3des encryption algorithm, after FPGA validation!
Platform: | Size: 12288 | Author: guochao | Hits:

[CA auth] 3des_vhdl

Description: DES-3 VHDL Code implemented on FPGA ,including related document
Platform: | Size: 138240 | Author: VISHWANATH PATEL | Hits:

[VHDL-FPGA-Verilog] DES

Description: DES算法的FPGA实现希望能有用。-DES algorithm can be useful to achieve the desired FPGA
Platform: | Size: 399360 | Author: house2 | Hits:

[Communication-Mobile] core_licenses_full

Description: 这个是XILINX公司FPGA的aurora，IP授权！！完全好用!-This is the XILINX' s FPGA-aurora, IP licensing! ! Totally easy to use!
Platform: | Size: 2048 | Author: lele | Hits:

[Embeded-SCM Develop] FPGA

Description: 此课件是基于FPGA的加密芯片设计实例，DES的FPGA实现，包括DES加密算法简述，DES的伪代码描述，设计流程，运算电路模型设计，算法程序设计 -The courseware is based on the FPGA chip design example of encryption, DES for FPGA implementation, including the DES encryption algorithm briefly, DES pseudo-code description of the design process, operation circuit modeling, algorithm programming
Platform: | Size: 3852288 | Author: betty | Hits:

[Software Engineering] des1

Description: 从万方数据库中下的介绍des加密以及解密的两片文章，是用FPGA实现的,pdf格式.希望对理解des加密以及解密的原理有所帮助。 -From the description of the database under the des encryption and decryption of the two articles is the use of FPGA implementation, pdf format. Hope to understand the principles of des encryption and decryption help.
Platform: | Size: 277504 | Author: chengpan | Hits:

[VHDL-FPGA-Verilog] DESalgorithmforfpgadesignsata

Description: 利用fpga接sata的方案，在fpga进行des加密，难得的参考价值-Sata using fpga access program, conducted in fpga des encryption, unique reference
Platform: | Size: 3741696 | Author: tianzhen | Hits:

[Crack Hack] des

Description: 基于FPGA的DES加解密系统的实现，希望对大家有帮助-FPGA-based implementation of DES encryption and decryption system
Platform: | Size: 928768 | Author: 姜晓鸥 | Hits:

[VHDL-FPGA-Verilog] FPGA-BASIC-DES

Description: 采用vhdl实现DES算法，有详细的设计理论。为电子科技大学研究生论文。-VHDL realize the use of DES algorithm, a detailed design theory. For the University of Electronic Science and Technology Graduate thesis.
Platform: | Size: 2537472 | Author: 邓秀华 | Hits:

[VHDL-FPGA-Verilog] SIMULATION-AND-SYNTHESIS-OF-TRIPLE-DES-BLOCK-CIPH

Description: This project presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously introduced technique to protect smart card implementations from these attacks. Triple DES was the answer to many of the shortcomings of DES. Since it is based on the DES algorithm, it is very easy to modify existing software to use Triple DES. It also has the advantage of proven reliability and a longer key length that eliminates many of the shortcut attacks that can be used to reduce the amount of time it takes to break DES. However, even this more powerful version of DES may not be strong enough to protect data for very much longer. The DES algorithm itself has become obsolete and is in need of replacement.DES encrypts data in 64-bit and it is a symmetric algorithm. The key length is 56-bits. KEY WORDS: DES, Encryption, Decryption, Cryptography, Simulation, Synthesis, TDES, Cipher.
Platform: | Size: 5363712 | Author: abilash | Hits:

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