Welcome![Sign In][Sign Up]
Location:
Search - convolutional encoder vhdl code

Search list

[VHDL-FPGA-Verilogviterbi

Description: 卷积码编码及其Viterbi译码的实现-Convolutional code encoder and Viterbi decoding to achieve
Platform: | Size: 256000 | Author: mediative | Hits:

[VHDL-FPGA-Verilogproject

Description: convolutional encoder vhdl code, rate 1/2, k=3
Platform: | Size: 4096 | Author: phani | Hits:

[Software Engineeringgenerate_trellis_rsc_c

Description: vhdl code for convolutional encoder
Platform: | Size: 2048 | Author: anjali | Hits:

[Otherviterbi213

Description: 编码方式为213的Viterbi卷积码编码器和译码器的FPGA的实现,包含整个QuartusII的工程文件,解码方式为寄存器交换法-Encoding for the 213 convolutional code encoder and Viterbi decoder FPGA realization of the project file that contains the entire QuartusII, decoding method for the register exchange
Platform: | Size: 2668544 | Author: jenny | Hits:

[Communication-Mobileconvencode2

Description: 卷积码(2,1,3)编码过程。代码清晰简单,对应人民邮电版《通信原理》中卷积码编码过程-Convolutional code (2,1,3) encoder. Code is clear and straightforward, Telecommunications for the corresponding version of " Communication Principle" in the process of convolutional coding
Platform: | Size: 118784 | Author: zhaodanlin | Hits:

[VHDL-FPGA-Verilog123

Description: 将通过仿真的VHDL 程序下载到FPGA 芯片EPF10K10LC84-3 上,取得了较为满意的结果。本设计选择的(3,1,2)卷积码和(2,1,1)卷积码,都是极具代表性的卷积码。因为卷积码具有相似的结构和特点,所以(3,1,2)卷积编码器和(2,1,1)卷积解码器的设计思想,具有普遍适用性。-Through the simulation of the VHDL program downloaded to the FPGA chip EPF10K10LC84-3, the obtained satisfactory results. The design choices (3,1,2) convolutional code and (2,1,1) convolutional code, are highly representative of convolutional codes. For convolutional codes with similar structure and characteristics, so (3,1,2) convolutional encoder and (2,1,1) convolutional decoder design has general applicability.
Platform: | Size: 5120 | Author: 王彬 | Hits:

[VHDL-FPGA-Verilogabc

Description: 卷积码编码器的实现,用的是vhdl语言。这是毕设时做的,已经调通。-Convolutional code encoder implementation, using vhdl language. This is done when the complete set has been transferred through.
Platform: | Size: 4096 | Author: decoder | Hits:

[VHDL-FPGA-Verilogencoder

Description: 802.11a卷积码的实现,使用公式133和177,可以用标准viterbi解码-802.11a convolutional code to achieve, using the formula 133 and 177, you can use standard viterbi decoding
Platform: | Size: 1024 | Author: Team | Hits:

[Modem programconvolutional-encoder

Description: In this case is a convolutional encoding code for decoding the convolutional code, using VHDL language. This code provide the method of convolutional encoding for input data. (2,1,7)
Platform: | Size: 1024 | Author: kimdaeyoung | Hits:

[Program docConvolutional-encoder-VHDL-code-_-VHDL-Programmin

Description: convolutional encoder in vhdl
Platform: | Size: 334848 | Author: sampath | Hits:

CodeBus www.codebus.net