Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - code vhdl

Search list

[Other resource] [eda]vhdl

Description: 福州大学EDA选修课所有实验课程代码。VHDL语言描述（vhd），以及电路图（gdf）-Fuzhou University EDA optional courses in all experimental code. VHDL description (vhd), and circuit (GdF)
Platform: | Size: 222534 | Author: 林锋杰 | Hits:

[VHDL-FPGA-Verilog] FFT的VHDL源代码

Description: FFT的VHDL源代码-fft vhdl source code
Platform: | Size: 29696 | Author: 阿林 | Hits:

[VHDL-FPGA-Verilog] USB 1.1 IP-CORE和设计范例 VHDL源代码

Description: USB 1.1 IP-CORE和设计范例 VHDL源代码-Sample program for USB1.1 IP core design, VHDL source code
Platform: | Size: 425984 | Author: ken | Hits:

[VHDL-FPGA-Verilog] vhdl实现alu的源代码

Description: VHDL实现ALU的源代码，并且提供了一个详细的testbench！-ALU VHDL source code, and provide a detailed testbench!
Platform: | Size: 1024 | Author: 飞扬 | Hits:

[VHDL-FPGA-Verilog] 100个vhdl设计例子

Description: 内附多路选择器，74系列芯片VHDL源码，加法器，FIR，比较器等大量例子，对初学VHDL语言很有好处。可用maxplus，quartus，synplicity等综合软件进行调试-contains multiple-choice, 74 chips VHDL source code, the adder, FIR, comparators, etc. are plenty of examples for beginners VHDL very good. Available maxplus, Quartus, synplicity integrated software debugging
Platform: | Size: 233472 | Author: 杰轩 | Hits:

[VHDL-FPGA-Verilog] [eda]vhdl

Description: 福州大学EDA选修课所有实验课程代码。VHDL语言描述（vhd），以及电路图（gdf）-Fuzhou University EDA optional courses in all experimental code. VHDL description (vhd), and circuit (GdF)
Platform: | Size: 222208 | Author: 林锋杰 | Hits:

[VHDL-FPGA-Verilog] uart-verilog-vhdl

Description: 拿verilog和vhdl编写的串口通信代码(可综合)-with vhdl and verilog prepared by the serial communication code (synthesis)
Platform: | Size: 294912 | Author: 刘索山 | Hits:

[VHDL-FPGA-Verilog] hanmin

Description: 4位汉明编译码源代码。VHDL格式，经过仿真和测试通过，请放心使用。-four Hamming encryption source code. VHDL format, through simulation and test pass, please rest assured that use.
Platform: | Size: 138240 | Author: 田军卓 | Hits:

[Crack Hack] 3des-VHDL

Description: 3des的VHDL实现，适用于quartus环境-3des VHDL applicable to the environment quartus
Platform: | Size: 95232 | Author: xin | Hits:

[Software Engineering] (7)VHDL

Description: 是老师介绍的一些关于vhdl设计的源程序及讲解，感觉还不错，要不你们-teachers on the design of some of the source code vhdl and briefings, the feeling was pretty good, you want to try
Platform: | Size: 569344 | Author: 张松 | Hits:

[Software Engineering] filter-vhdl-code

Description: filter-vhdl-code.rar为滤波器的完整VHDL程序，可用于IIR与FIR滤波器的仿真与验证实现，包括代码综合。使用版本为ISE6.3.-filter-vhdl-code.rar for the integrity of filter VHDL procedures, can be used for IIR and FIR filters realize simulation and verification, including an integrated code. Use version ISE6.3.
Platform: | Size: 173056 | Author: petri | Hits:

[Communication-Mobile] LDPC(VHDL)

Description: 低密度奇偶校验码的VHDL程序，用于LDPC码的硬件实现-LDPC code VHDL program for the LDPC code of hardware implementation
Platform: | Size: 2048 | Author: 赵天婵 | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: 伪随机序列发生器的vhdl算法 设计一个伪随机序列发生器，采用的生成多项式为1+X^3+X^7。要求具有一个RESET端和两个控制端来调整寄存器初值（程序中设定好四种非零初值可选）。 -Pseudo-random sequence generator algorithm VHDL design of a pseudo-random sequence generator, using the generation polynomial for the 1+ X ^ 3+ X ^ 7. RESET has a client request and the two control registers client to adjust the initial value (procedures set of four non-zero initial value optional).
Platform: | Size: 1024 | Author: 文成 | Hits:

[Embeded-SCM Develop] xapp616

Description: huffman code vhdl program
Platform: | Size: 13312 | Author: andy singh | Hits:

[VHDL-FPGA-Verilog] motorcontrol(vhdl)

Description: 基于FPGA的直电机伺服系统的设计的代码，VHDL语言。包括前馈控制，AD1674控制模块，ADC0809控制模块，前馈控制模块，分频模块等。-FPGA-based servo system direct the design of the electrical code, VHDL language. Including feed-forward control, AD1674 control module, ADC0809 control module, feed-forward control module, such as sub-frequency modules.
Platform: | Size: 6144 | Author: dong | Hits:

[VHDL-FPGA-Verilog] CLA.VHDL.CODE

Description: cla vhdl code with a picture files.
Platform: | Size: 339968 | Author: YD | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 双口RAM模块源代码（VHDL）,用于开发FPGA的双口RAM，可以直接下载到工程中使用。-Dual-port RAM module source code (VHDL), for the development of FPGA' s dual-port RAM, can be directly downloaded to the project use.
Platform: | Size: 1024 | Author: wu | Hits:

[VHDL-FPGA-Verilog] DWT-VHDL

Description: 小波变换的VHDL代码，内带正变换逆变换的测试文件。-Wavelet transform VHDL code, with a positive transformation within the inverse transform of the test file.
Platform: | Size: 18432 | Author: Janee | Hits:

[VHDL-FPGA-Verilog] code-vhdl-cho-cpu

Description: code VHDL for Advanced Encryption Standard
Platform: | Size: 1889280 | Author: trong | Hits:

[VHDL-FPGA-Verilog] CD-ROM-code-(vhdl)

Description: 数字信号处理的fpga实现 第2版-光盘代码(vhdl)-Fpga implementation of digital signal processing 2nd Edition- CD-ROM code (vhdl)
Platform: | Size: 267264 | Author: 周诚 | Hits:
« 12 3 4 5 6 7 8 9 10 ... 50 »

CodeBus www.codebus.net