Search - altera ip fft

[matlab] fft

Description: This example describes a 32K-point fast Fourier transform (FFT) using the Altera FFT IP MegaCore.
Platform: | Size: 983863 | Author: joey196t@yahoo.com.tw | Hits:

[VHDL-FPGA-Verilog] 2C35F672_FFT

Description: 在Altera芯片2C35F672平台上的FFT程序，采用DSPBuilder5.0，生成Verilog文件。开发环境：QuartusII5.0。-In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Verilog file. Development Environment: QuartusII5.0.
Platform: | Size: 474112 | Author: lovenevol | Hits:

[VHDL-FPGA-Verilog] FFTVHDl

Description: 基于FPGA的fft实现摘要：本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核，代替传统DSP芯片或高性能单片机，实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core (Nios) soft-core processor, chip or replace the traditional high-performance single-chip DSP to realize the audio signals based on FFT analysis .
Platform: | Size: 32768 | Author: xiang | Hits:

[VHDL-FPGA-Verilog] FFT_verilog

Description: verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
Platform: | Size: 618496 | Author: culun | Hits:

[Other] fftsoft

Description: 应用altera的最新fft核做的使用范例，fft核遵循avalon总线。对于想使用altera的IP core的朋友有帮助-Application of nuclear altera do the latest example of the use fft, fft nuclear follow avalon bus. Who want to use the IP core of friends altera help
Platform: | Size: 4036608 | Author: 样样 | Hits:

[VHDL-FPGA-Verilog] fft_32K

Description: This example describes a 32K-point fast Fourier transform using the Altera FFT IP MegaCore. 描述了一个32K的点快速傅立叶变换（FFT）。
Platform: | Size: 984064 | Author: Joey196t | Hits:

[VHDL-FPGA-Verilog] fft_ug

Description: altera的FFT IP核的用户手册，介绍了如何使用ALTERA IP核生成FFT核，如何设置参数并讲述了如何仿真，适用于通信方面的FPGA设计工程师，学生。-altera' s FFT IP core user manual describes how to use the ALTERA IP core generated FFT core, how to set parameters and describes how to simulate, for communications, FPGA design engineers, students.
Platform: | Size: 1035264 | Author: zhangdong | Hits:

[VHDL-FPGA-Verilog] fft_ip_core

Description: FFT的FPGA硬件实现，利用ALTERA公司的IP核来实现此功能,包含工程文件和相关例程-FFT hardware implementation, FPGA implementation of FFT function, using ALTERA s IP core to achieve this functionality
Platform: | Size: 299008 | Author: 李辉 | Hits:

[VHDL-FPGA-Verilog] FFF-IP-Core

Description: Altera FFT兆核函数的使用说明，希望对大家有所帮助。-The use of Altera FFT trillion nuclear function, we want to help.
Platform: | Size: 1147904 | Author: lg | Hits:

[Industry research] biyesejitognxinxitong

Description: 中文摘要正交频分复用（ OFDM ， Orthogonal Frequency Division Multiplexing）是当前一种非常热门的通信技术。它即可以被看作是一种调制技术，也可以被看作是一种复用技术。由于它具有抗多径衰落和频谱利用率高的特点，因此被广泛应用于高速数字通信领域，比如应用于IEEE 802.11a无线局域网（WLAN）的物理层等等。我的毕业设计的核心任务是：采用 FPGA 来实现一个基于OFDM 技术的通信系统中的基带数据处理部分，即调制解调器。其中发射部分的调制器包括：信道编码（Reed-Solomon 编码），交织，星座映射，FFT和插入循环前缀等模块。我另外制作了相应的解调器，可以实现上述功能的逆变换。另外，我还对OFDM技术， IEEE 802.11a的标准文献，基于Simulink 的 OFDM 模型和仿真，ALTERA 公司的技术和 IP Core 的使用等方面进行了研究。这些在文章中都有体现。 -Abstract Orthogonal frequency division multiplexing (OFDM, Orthogonal the Frequency Division, Multiplexing) is a very popular communication technology. It can be seen as a Modulation technique can also be seen as a multiplexing technique. Because of its resistance to multipath fading and spectrum High utilization characteristics, and is widely used in high-speed digital communications, such as used in IEEE 802.11a wireless LAN (WLAN) physical layer. The core mission of my graduation project: FPGA to implement a technology based on OFDM Communication systems in baseband data processing part, ie the modem. These emission part of the modulation Includes: channel coding (Reed-Solomon coding), interleaving, constellation mapping, FFT and interpolation Into the cyclic prefix modules. I also produced a corresponding demodulator can achieve the inverse of the above functions Transformation. In addition, OFDM technology, the IEEE 802.11a standard literature, based on Simulink
Platform: | Size: 1553408 | Author: 万利 | Hits:

[Other] FFT_test

Description: 在FPGA中实现快速傅立叶变换，调用ALTERA的IP核模块-FFT demo in FPGA
Platform: | Size: 15564800 | Author: yp | Hits:

[MPI] fft

Description: altera公司fft ip核的运用。语言是verilog.-Altera company s fft ip. Language verilog.
Platform: | Size: 11977728 | Author: shiyuan | Hits:

[Software Engineering] FFTPVerilog

Description: FFT Verilog RTL 经过测试与Altera FFT IP相当-FFT Verilog RTL Altera FFT IP
Platform: | Size: 8192 | Author: liu | Hits:

[Software Engineering] yinpinxinhaofenxiyi1233412

Description: 基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核的基于FFT的音频信号分析仪-Based on Altera Cyclone II series FPGA embedded high-performance embedded IP core (Nios) soft core processor FFT-based audio signal analyzer
Platform: | Size: 155648 | Author: 张文 | Hits:

[VHDL-FPGA-Verilog] fft_test

Description: ALTERA的FFT IP核时序的仿真，verilog语言。采用burst方式，FFT点数2048点-FFT IP core of timing simulation ALTERA, verilog language. Using burst mode, FFT points 2048 points
Platform: | Size: 25623552 | Author: vincentspace | Hits:

[Embeded Linux] FFT

Description: 基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核,实现了基于FFT的音频信号分析-Altera Cyclone II FPGA family based embedded high-performance embedded IP core (Nios) soft core processor to achieve a FFT-based audio signal analysis
Platform: | Size: 2048 | Author: 季云 | Hits:

[VHDL-FPGA-Verilog] Altera FFT IP核使用实例

Description: Verilog，关于如何调用Altera官方的FFT iP核，如何输入和得到输出的实例。
Platform: | Size: 9807 | Author: dumn1234 | Hits:

[VHDL-FPGA-Verilog] cf-fft

Description: 用ip核实现fft。用vhdl编写。altera的fpga-Ip core implementation using fft. Written in vhdl
Platform: | Size: 5501952 | Author: 任天鹏 | Hits:

[Software Engineering] mnl_avalon_spec

Description: Avalon-ST manual for FFT mega IP-core altera.-Avalon-ST manual for FFT mega IP-core altera.
Platform: | Size: 993280 | Author: Jaydeep Parmar | Hits:

[VHDL-FPGA-Verilog] fft_analyze

Description: 利用Altera的IP核，实现FFT算法使用信息流模式读写，使用SignalTap II嵌入式逻辑分析仪观察信号，A/D只要是并行的8位芯片都可以。-Achiving FFT by using Altera IP Core,you can observe the signal by the embedded logic analyzer Signal Tap II,as for A/D device, it s suitable for a parllarel 8 bits A/D device.
Platform: | Size: 22096896 | Author: 常泽文 | Hits:

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[matlab] fft

[VHDL-FPGA-Verilog] 2C35F672_FFT

[VHDL-FPGA-Verilog] FFTVHDl

[VHDL-FPGA-Verilog] FFT_verilog

[Other] fftsoft

[VHDL-FPGA-Verilog] fft_32K

[VHDL-FPGA-Verilog] fft_ug

[VHDL-FPGA-Verilog] fft_ip_core

[VHDL-FPGA-Verilog] FFF-IP-Core

[Industry research] biyesejitognxinxitong

[Other] FFT_test

[MPI] fft

[Software Engineering] FFTPVerilog

[Software Engineering] yinpinxinhaofenxiyi1233412

[VHDL-FPGA-Verilog] fft_test

[Embeded Linux] FFT

[VHDL-FPGA-Verilog] Altera FFT IP核使用实例

[VHDL-FPGA-Verilog] cf-fft

[Software Engineering] mnl_avalon_spec

[VHDL-FPGA-Verilog] fft_analyze

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[matlab] fft

[VHDL-FPGA-Verilog] 2C35F672_FFT

[VHDL-FPGA-Verilog] FFTVHDl

[VHDL-FPGA-Verilog] FFT_verilog

[Other] fftsoft

[VHDL-FPGA-Verilog] fft_32K

[VHDL-FPGA-Verilog] fft_ug

[VHDL-FPGA-Verilog] fft_ip_core

[VHDL-FPGA-Verilog] FFF-IP-Core

[Industry research] biyesejitognxinxitong

[Other] FFT_test

[MPI] fft

[Software Engineering] FFTPVerilog

[Software Engineering] yinpinxinhaofenxiyi1233412

[VHDL-FPGA-Verilog] fft_test

[Embeded Linux] FFT

[VHDL-FPGA-Verilog] Altera FFT IP核 使用实例

[VHDL-FPGA-Verilog] cf-fft

[Software Engineering] mnl_avalon_spec

[VHDL-FPGA-Verilog] fft_analyze

CodeBus www.codebus.net

[VHDL-FPGA-Verilog] Altera FFT IP核使用实例