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[Other resource] usbhostslave

Description: USB主机和设备的verilog代码，实现了USB1.1协议规范的要求-USB host and equipment Verilog code to achieve the USB 1.1 protocol specification requirements
Platform: | Size: 501047 | Author: 张雷 | Hits:

[Other Embeded program] usbhostslave

Description:
Platform: | Size: 500736 | Author: 张雷 | Hits:

[USB develop] USB2_chip

Description: USB2.0 chip的一部分verilog源码。opencore上下的，还比较好用:)-USB2.0 chip part of Verilog source. Opencore ish, but also better quality :)
Platform: | Size: 35840 | Author: 戴鹏 | Hits:

[Embeded-SCM Develop] DE2_NIOS_HOST_MOUSE_VGA

Description: 利用该源代码可以实现在DE2的板子上进行USB画笔的实验-use of the source code can be achieved in the board Dictyophora USB brush on the experiment
Platform: | Size: 1024 | Author: 杨阿胡 | Hits:

[VHDL-FPGA-Verilog] WORKS

Description: Project of Adquisition Data, show in VGA and send to usb host
Platform: | Size: 9917440 | Author: lagartojj | Hits:

[Other] usb

Description: USB slave: It is contain a USB slave design written in verilog language. It is a interface between USB host and Functions such as memory, Keyboard, mouse and so on.-SB slave: It is contain a USB slave design written in verilog language. It is a interface between USB host and Functions such as memory, Keyboard, mouse and so on.
Platform: | Size: 231424 | Author: william | Hits:

[VHDL-FPGA-Verilog] usb_host1

Description: verilog 的主机访问程序，与设备端程序配套，已验证-verilog for usb host
Platform: | Size: 27648 | Author: hehehaha2014 | Hits:

[VHDL-FPGA-Verilog] usb_rd_buffer

Description: FPGA（SPARTAN6）通过USB协议与开发板上的USB芯片进行数据读写测试，在上位机上可以看到USB发来的数据，也可以通过修改VERILOG代码完成数据的接收(FPGA (SPARTAN6) can read and write data through the USB chip on the development board through the USB protocol. The data sent by USB can be seen on the host computer, and the data can be received by modifying the VERILOG code)
Platform: | Size: 4411392 | Author: marktuwen | Hits:

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